mux_qab.tdf

详细介绍SDRAM原理的中文电子书籍

--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=2 LPM_WIDTH=3 LPM_WIDTHS=1 data result sel
--VERSION_BEGIN 5.0 cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ  VERSION_END


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--synthesis_resources = lut 3 
SUBDESIGN mux_qab
( 
	data[5..0]	:	input;
	result[2..0]	:	output;
	sel[0..0]	:	input;
) 
VARIABLE 
	result_node[2..0]	: WIRE;
	sel_node[0..0]	: WIRE;
	w_data71w[1..0]	: WIRE;
	w_data85w[1..0]	: WIRE;
	w_data97w[1..0]	: WIRE;
	w_result104w	: WIRE;
	w_result72w	: WIRE;
	w_result78w	: WIRE;
	w_result86w	: WIRE;
	w_result92w	: WIRE;
	w_result98w	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( w_result98w, w_result86w, w_result72w);
	sel_node[] = ( sel[0..0]);
	w_data71w[] = ( data[3..3], data[0..0]);
	w_data85w[] = ( data[4..4], data[1..1]);
	w_data97w[] = ( data[5..5], data[2..2]);
	w_result104w = ((sel_node[] & w_data97w[1..1]) # ((! sel_node[]) & w_data97w[0..0]));
	w_result72w = w_result78w;
	w_result78w = ((sel_node[] & w_data71w[1..1]) # ((! sel_node[]) & w_data71w[0..0]));
	w_result86w = w_result92w;
	w_result92w = ((sel_node[] & w_data85w[1..1]) # ((! sel_node[]) & w_data85w[0..0]));
	w_result98w = w_result104w;
END;
--VALID FILE