i2c_altera.fit.qmsg

详细介绍SDRAM原理的中文电子书籍

{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_PLL_CLK_PROMOTION" "" "Info: Promoted PLL clock signals" { { "Info" "IFYGR_FYGR_PLL_PROMOTE_GCLK" "SYSCLK " "Info: Promoted signal \"SYSCLK\" to use global clock" {  } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "SYSCLK" } { 0 "SYSCLK" } } } } { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 1528 160 328 1544 "SYSCLK" "" } } } } { "D:/RedLogic/VBuffer/db/I2C_ALTERA_cmp.qrpt" "" { Report "D:/RedLogic/VBuffer/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "D:/RedLogic/VBuffer/db/I2C_ALTERA.quartus_db" { Floorplan "D:/RedLogic/VBuffer/" "" "" { SYSCLK } "NODE_NAME" } "" } } { "D:/RedLogic/VBuffer/I2C_ALTERA.fld" "" { Floorplan "D:/RedLogic/VBuffer/I2C_ALTERA.fld" "" "" { SYSCLK } "NODE_NAME" } }  } 0} { "Info" "IFYGR_FYGR_PLL_PROMOTE_GCLK_USER" "PLL:inst3\|altpll:altpll_component\|_clk0 " "Info: Promoted signal \"PLL:inst3\|altpll:altpll_component\|_clk0\" to use global clock (user assigned)" {  } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "PLL:inst3\|altpll:altpll_component\|_clk0" } { 0 "PLL:inst3\|altpll:altpll_component\|_clk0" } } } } { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 1472 496 752 1648 "inst3" "" } } } } { "altpll.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/altpll.tdf" 763 3 0 } } { "D:/RedLogic/VBuffer/db/I2C_ALTERA_cmp.qrpt" "" { Report "D:/RedLogic/VBuffer/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "D:/RedLogic/VBuffer/db/I2C_ALTERA.quartus_db" { Floorplan "D:/RedLogic/VBuffer/" "" "" { PLL:inst3|altpll:altpll_component|_clk0 } "NODE_NAME" } "" } } { "D:/RedLogic/VBuffer/I2C_ALTERA.fld" "" { Floorplan "D:/RedLogic/VBuffer/I2C_ALTERA.fld" "" "" { PLL:inst3|altpll:altpll_component|_clk0 } "NODE_NAME" } }  } 0} { "Info" "IFYGR_FYGR_PLL_PROMOTE_GCLK_USER" "PLL:inst3\|altpll:altpll_component\|_clk1 " "Info: Promoted signal \"PLL:inst3\|altpll:altpll_component\|_clk1\" to use global clock (user assigned)" {  } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "PLL:inst3\|altpll:altpll_component\|_clk1" } { 0 "PLL:inst3\|altpll:altpll_component\|_clk0" } } } } { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 1472 496 752 1648 "inst3" "" } } } } { "altpll.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/altpll.tdf" 763 3 0 } } { "D:/RedLogic/VBuffer/db/I2C_ALTERA_cmp.qrpt" "" { Report "D:/RedLogic/VBuffer/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "D:/RedLogic/VBuffer/db/I2C_ALTERA.quartus_db" { Floorplan "D:/RedLogic/VBuffer/" "" "" { PLL:inst3|altpll:altpll_component|_clk0 } "NODE_NAME" } "" } } { "D:/RedLogic/VBuffer/I2C_ALTERA.fld" "" { Floorplan "D:/RedLogic/VBuffer/I2C_ALTERA.fld" "" "" { PLL:inst3|altpll:altpll_component|_clk0 } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "PLL Placement Operation " "Info: Completed PLL Placement Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "PCLK Global clock in PIN 28 " "Info: Automatically promoted some destinations of signal \"PCLK\" to use Global clock in PIN 28" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "ENC_CLK " "Info: Destination \"ENC_CLK\" may be non-global or may not use global clock" {  } { { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 992 2952 3128 1008 "ENC_CLK" "" } } } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "CLK_27M " "Info: Destination \"CLK_27M\" may be non-global or may not use global clock" {  } { { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 560 2336 2512 576 "CLK_27M" "" } } } }  } 0}  } { { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 816 1640 1808 832 "PCLK" "" } { 984 2912 2952 1000 "PCLK" "" } } } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "clk_gen:inst19\|clkout Global clock " "Info: Automatically promoted some destinations of signal \"clk_gen:inst19\|clkout\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "clk_gen:inst19\|clkout " "Info: Destination \"clk_gen:inst19\|clkout\" may be non-global or may not use global clock" {  } { { "clk_gen.v" "" { Text "D:/RedLogic/VBuffer/clk_gen.v" 11 -1 0 } }  } 0}  } { { "clk_gen.v" "" { Text "D:/RedLogic/VBuffer/clk_gen.v" 11 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "Led_run:inst21\|Mega_cnt\[23\] Global clock " "Info: Automatically promoted some destinations of signal \"Led_run:inst21\|Mega_cnt\[23\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "Led_run:inst21\|Mega_cnt\[23\] " "Info: Destination \"Led_run:inst21\|Mega_cnt\[23\]\" may be non-global or may not use global clock" {  } { { "Led_run.v" "" { Text "D:/RedLogic/VBuffer/Led_run.v" 7 -1 0 } }  } 0}  } { { "Led_run.v" "" { Text "D:/RedLogic/VBuffer/Led_run.v" 7 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "RST Global clock in PIN 131 " "Info: Automatically promoted some destinations of signal \"RST\" to use Global clock in PIN 131" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|CAS_N " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|CAS_N\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 73 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|RAS_N " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|RAS_N\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 72 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|WE_N " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|WE_N\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 74 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|CS_N " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|CS_N\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 70 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[10\] " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[10\]\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 68 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[9\] " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[9\]\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 68 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[8\] " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[8\]\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 68 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[7\] " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[7\]\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 68 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[6\] " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[6\]\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 68 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[5\] " "Info: Destination \"mesure_card_top:inst5\|sdr_sdram:sdr_sdram1\|command:command1\|SA\[5\]\" may be non-global or may not use global clock" {  } { { "command.v" "" { Text "D:/RedLogic/VBuffer/command.v" 68 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0}  } { { "I2C_ALTERA.bdf" "" { Schematic "D:/RedLogic/VBuffer/I2C_ALTERA.bdf" { { 1080 192 360 1096 "RST" "" } { 1072 376 528 1088 "rst" "" } { 1536 912 936 1552 "rst" "" } { 776 1752 1864 792 "rst" "" } { 712 2280 2368 728 "rst" "" } } } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "filter:inst8\|rst_out Global clock " "Info: Automatically promoted some destinations of signal \"filter:inst8\|rst_out\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd:inst\|cmd_stop " "Info: Destination \"i2c_cmd:inst\|cmd_stop\" may be non-global or may not use global clock" {  } { { "i2c_cmd.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd:inst\|execute " "Info: Destination \"i2c_cmd:inst\|execute\" may be non-global or may not use global clock" {  } { { "i2c_cmd.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd:inst\|cmd_start " "Info: Destination \"i2c_cmd:inst\|cmd_start\" may be non-global or may not use global clock" {  } { { "i2c_cmd.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd:inst\|cmd_send " "Info: Destination \"i2c_cmd:inst\|cmd_send\" may be non-global or may not use global clock" {  } { { "i2c_cmd.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd:inst\|i2c_data_t\[7\] " "Info: Destination \"i2c_cmd:inst\|i2c_data_t\[7\]\" may be non-global or may not use global clock" {  } { { "i2c_cmd.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd.v" 11 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd_7128:inst18\|cmd_stop " "Info: Destination \"i2c_cmd_7128:inst18\|cmd_stop\" may be non-global or may not use global clock" {  } { { "i2c_cmd_7128.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd_7128.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd_7128:inst18\|execute " "Info: Destination \"i2c_cmd_7128:inst18\|execute\" may be non-global or may not use global clock" {  } { { "i2c_cmd_7128.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd_7128.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd_7128:inst18\|cmd_send " "Info: Destination \"i2c_cmd_7128:inst18\|cmd_send\" may be non-global or may not use global clock" {  } { { "i2c_cmd_7128.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd_7128.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd_7128:inst18\|i2c_data_t\[7\] " "Info: Destination \"i2c_cmd_7128:inst18\|i2c_data_t\[7\]\" may be non-global or may not use global clock" {  } { { "i2c_cmd_7128.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd_7128.v" 11 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "i2c_cmd_7128:inst18\|cmd_start " "Info: Destination \"i2c_cmd_7128:inst18\|cmd_start\" may be non-global or may not use global clock" {  } { { "i2c_cmd_7128.v" "" { Text "D:/RedLogic/VBuffer/i2c_cmd_7128.v" 9 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0}  } { { "filter.v" "" { Text "D:/RedLogic/VBuffer/filter.v" 3 -1 0 } }  } 0}