i2c_altera.qsf

详细介绍SDRAM原理的中文电子书籍

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		I2C_ALTERA_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:09:10  AUGUST 10, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name VECTOR_WAVEFORM_FILE I2C_ALTERA.vwf
set_global_assignment -name MIF_FILE TEST_CNF.mif
set_global_assignment -name VECTOR_WAVEFORM_FILE I2C_ALTERA_SIM.vwf
set_global_assignment -name SIGNALTAP_FILE VIDEO_7113.stp
set_global_assignment -name SIGNALTAP_FILE stp1.stp
set_global_assignment -name SIGNALTAP_FILE stp2.stp
set_global_assignment -name SIGNALTAP_FILE "E:\\project\\mesure_card\\post\\stp1.stp"
set_global_assignment -name SIGNALTAP_FILE stp3.stp
set_global_assignment -name SIGNALTAP_FILE Vbuffer.stp
set_global_assignment -name VERILOG_FILE Y2Cb.v
set_global_assignment -name VERILOG_FILE rom_color_gen_rgb.v
set_global_assignment -name VERILOG_FILE ram256_32to1k_8.v
set_global_assignment -name VERILOG_FILE ram2k_2to512_8.v
set_global_assignment -name VERILOG_FILE arbiter.v
set_global_assignment -name VERILOG_FILE rom_sel.v
set_global_assignment -name VERILOG_FILE i2c_cmd_two.v
set_global_assignment -name VERILOG_FILE vga_vl.v
set_global_assignment -name VERILOG_FILE ram512_32.v
set_global_assignment -name VERILOG_FILE rom2p017_cb.v
set_global_assignment -name VERILOG_FILE rom0p813_cr.v
set_global_assignment -name VERILOG_FILE rom1p164_y.v
set_global_assignment -name VERILOG_FILE rom1p596_cr.v
set_global_assignment -name VERILOG_FILE rom0p392_cb.v
set_global_assignment -name VERILOG_FILE vga_out.v
set_global_assignment -name VERILOG_FILE image_ntsc.v
set_global_assignment -name VERILOG_FILE params_dsp.v
set_global_assignment -name VERILOG_FILE blank_gen.v
set_global_assignment -name VERILOG_FILE command.v
set_global_assignment -name VERILOG_FILE command_dsp.v
set_global_assignment -name VERILOG_FILE control_interface.v
set_global_assignment -name VERILOG_FILE control_interface_dsp.v
set_global_assignment -name VERILOG_FILE datacnl.v
set_global_assignment -name VERILOG_FILE datacnl_dsp.v
set_global_assignment -name VERILOG_FILE image0109.v
set_global_assignment -name VERILOG_FILE mesure_card_top.v
set_global_assignment -name VERILOG_FILE params.v
set_global_assignment -name VERILOG_FILE ram1k_8to256_32.v
set_global_assignment -name VERILOG_FILE ram1k_8to512_16.v
set_global_assignment -name VERILOG_FILE ram256_16to512_8.v
set_global_assignment -name VERILOG_FILE ram2k_4to512_16.v
set_global_assignment -name VERILOG_FILE ram512_16to1024_8.v
set_global_assignment -name VERILOG_FILE ram512_16to1k_8.v
set_global_assignment -name VERILOG_FILE ram512_16to2k_4.v
set_global_assignment -name VERILOG_FILE ram512_32to2k_8.v
set_global_assignment -name VERILOG_FILE ram512_8.v
set_global_assignment -name VERILOG_FILE ram512_8to256_16.v
set_global_assignment -name VERILOG_FILE receiver.v
set_global_assignment -name VERILOG_FILE sdr_data_path.v
set_global_assignment -name VERILOG_FILE sdr_data_path_dsp.v
set_global_assignment -name VERILOG_FILE sdr_sdram.v
set_global_assignment -name VERILOG_FILE sdr_sdram_dsp.v
set_global_assignment -name VERILOG_FILE sender_vga.v
set_global_assignment -name VERILOG_FILE sender_video.v
set_global_assignment -name VERILOG_FILE filter.v
set_global_assignment -name AHDL_FILE I2C.TDF
set_global_assignment -name BDF_FILE I2C_ALTERA.bdf
set_global_assignment -name VERILOG_FILE clk_div.v
set_global_assignment -name VERILOG_FILE clk_gen.v
set_global_assignment -name VERILOG_FILE gen_sync.v

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_153 -to SYSCLK
set_location_assignment PIN_131 -to RST
set_location_assignment PIN_44 -to SCL
set_location_assignment PIN_43 -to SDA
set_location_assignment PIN_28 -to PCLK
set_location_assignment PIN_42 -to PDATA[0]
set_location_assignment PIN_41 -to PDATA[1]
set_location_assignment PIN_23 -to PDATA[2]
set_location_assignment PIN_21 -to PDATA[3]
set_location_assignment PIN_20 -to PDATA[4]
set_location_assignment PIN_19 -to PDATA[5]
set_location_assignment PIN_18 -to PDATA[6]
set_location_assignment PIN_17 -to PDATA[7]
set_location_assignment PIN_45 -to P_HS
set_location_assignment PIN_46 -to P_VS
set_location_assignment PIN_114 -to ENC_CLK
set_location_assignment PIN_140 -to ENC_DATA[0]
set_location_assignment PIN_135 -to ENC_DATA[1]
set_location_assignment PIN_124 -to ENC_DATA[2]
set_location_assignment PIN_125 -to ENC_DATA[3]
set_location_assignment PIN_126 -to ENC_DATA[4]
set_location_assignment PIN_127 -to ENC_DATA[5]
set_location_assignment PIN_128 -to ENC_DATA[6]
set_location_assignment PIN_113 -to ENC_DATA[7]
set_location_assignment PIN_106 -to ENC_HS
set_location_assignment PIN_107 -to ENC_VS
set_location_assignment PIN_133 -to SCL_ENC
set_location_assignment PIN_132 -to SDA_ENC
set_location_assignment PIN_7 -to LEDG[0]
set_location_assignment PIN_8 -to LEDG[1]
set_location_assignment PIN_11 -to LEDG[2]
set_location_assignment PIN_12 -to LEDG[3]
set_location_assignment PIN_194 -to SDRAM_A[0]
set_location_assignment PIN_193 -to SDRAM_A[10]
set_location_assignment PIN_195 -to SDRAM_A[1]
set_location_assignment PIN_196 -to SDRAM_A[2]
set_location_assignment PIN_222 -to SDRAM_A[3]
set_location_assignment PIN_219 -to SDRAM_A[4]
set_location_assignment PIN_218 -to SDRAM_A[5]
set_location_assignment PIN_217 -to SDRAM_A[6]
set_location_assignment PIN_216 -to SDRAM_A[7]
set_location_assignment PIN_215 -to SDRAM_A[8]
set_location_assignment PIN_214 -to SDRAM_A[9]
set_location_assignment PIN_187 -to SDRAM_BA[0]
set_location_assignment PIN_188 -to SDRAM_BA[1]
set_location_assignment PIN_183 -to SDRAM_CAS_N
set_location_assignment PIN_170 -to SDRAM_CKE
set_location_assignment PIN_185 -to SDRAM_CS_N
set_location_assignment PIN_181 -to SDRAM_DQM[0]
set_location_assignment PIN_169 -to SDRAM_DQM[1]
set_location_assignment PIN_197 -to SDRAM_DQM[2]
set_location_assignment PIN_223 -to SDRAM_DQM[3]
set_location_assignment PIN_180 -to SDRAM_DQ[0]
set_location_assignment PIN_166 -to SDRAM_DQ[10]
set_location_assignment PIN_165 -to SDRAM_DQ[11]
set_location_assignment PIN_164 -to SDRAM_DQ[12]
set_location_assignment PIN_163 -to SDRAM_DQ[13]
set_location_assignment PIN_162 -to SDRAM_DQ[14]
set_location_assignment PIN_161 -to SDRAM_DQ[15]
set_location_assignment PIN_200 -to SDRAM_DQ[16]
set_location_assignment PIN_201 -to SDRAM_DQ[17]
set_location_assignment PIN_202 -to SDRAM_DQ[18]
set_location_assignment PIN_203 -to SDRAM_DQ[19]
set_location_assignment PIN_179 -to SDRAM_DQ[1]
set_location_assignment PIN_206 -to SDRAM_DQ[20]
set_location_assignment PIN_207 -to SDRAM_DQ[21]
set_location_assignment PIN_208 -to SDRAM_DQ[22]
set_location_assignment PIN_213 -to SDRAM_DQ[23]
set_location_assignment PIN_235 -to SDRAM_DQ[24]
set_location_assignment PIN_234 -to SDRAM_DQ[25]
set_location_assignment PIN_233 -to SDRAM_DQ[26]
set_location_assignment PIN_228 -to SDRAM_DQ[27]
set_location_assignment PIN_227 -to SDRAM_DQ[28]
set_location_assignment PIN_226 -to SDRAM_DQ[29]
set_location_assignment PIN_178 -to SDRAM_DQ[2]
set_location_assignment PIN_225 -to SDRAM_DQ[30]
set_location_assignment PIN_224 -to SDRAM_DQ[31]
set_location_assignment PIN_177 -to SDRAM_DQ[3]
set_location_assignment PIN_176 -to SDRAM_DQ[4]
set_location_assignment PIN_175 -to SDRAM_DQ[5]
set_location_assignment PIN_174 -to SDRAM_DQ[6]
set_location_assignment PIN_173 -to SDRAM_DQ[7]
set_location_assignment PIN_168 -to SDRAM_DQ[8]
set_location_assignment PIN_167 -to SDRAM_DQ[9]
set_location_assignment PIN_184 -to SDRAM_RAS_N
set_location_assignment PIN_182 -to SDRAM_WE_N
set_location_assignment PIN_15 -to USER_PB[0]
set_location_assignment PIN_16 -to USER_PB[1]
set_location_assignment PIN_13 -to USER_PB[2]
set_location_assignment PIN_14 -to USER_PB[3]
set_location_assignment PIN_144 -to SDRAM_CLK
set_location_assignment PIN_138 -to FLASH_CE_N
set_location_assignment PIN_139 -to FLASH_OE_N
set_location_assignment PIN_137 -to FLASH_WE_N
set_location_assignment PIN_123 -to SRAM_CE_N
set_location_assignment PIN_118 -to SRAM_OE_N
set_location_assignment PIN_99 -to SRAM_WE_N
set_location_assignment PIN_15 -to VideoLock
set_location_assignment PIN_186 -to SDRAM_A[11]
set_location_assignment PIN_13 -to NP_SEL

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE PQFP
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY I2C_ALTERA
set_global_assignment -name USER_LIBRARIES "f:\\i2c_altera"
set_global_assignment -name AUTO_ENABLE_SMART_COMPILE on

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# EDA Netlist Writer Assignments
# ==============================
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"

# Assembler Assignments
# =====================
set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS1
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name GLITCH_INTERVAL 1
set_global_assignment -name VECTOR_INPUT_SOURCE I2C_ALTERA.vwf

# SignalTap II Assignments
# ========================
set_global_assignment -name ENABLE_SIGNALTAP off
set_global_assignment -name USE_SIGNALTAP_FILE stp3.stp

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF

# ---------------------------------------
# start EDA_TOOL_SETTINGS(eda_simulation)

	# EDA Netlist Writer Assignments
	# ==============================
	set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id eda_simulation
	set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation

# end EDA_TOOL_SETTINGS(eda_simulation)
# -------------------------------------