i2c_altera.fit.summary

详细介绍SDRAM原理的中文电子书籍

Flow Status : Successful - Mon Mar 27 22:20:11 2006
Quartus II Version : 5.0 Build 171 11/03/2005 SP 2 SJ Full Version
Revision Name : I2C_ALTERA
Top-level Entity Name : I2C_ALTERA
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 1,202 / 12,060 ( 9 % )
Total pins : 132 / 173 ( 76 % )
Total virtual pins : 0
Total memory bits : 27,912 / 239,616 ( 11 % )
Total PLLs : 1 / 2 ( 50 % )