📄 enc28j60.lst
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240 1 { P11=0;
241 2 }
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 5
242 1
243 1 //bank 1 滤波器的设置
244 1 encWrite(ERXFCON,0x60); //1:and,0:or the second bit
245 1
246 1 // do bank 2 stuff
247 1 // enable MAC receive
248 1 encWrite(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
249 1 // bring MAC out of reset
250 1 encWrite(MACON2, 0x00);
251 1
252 1 if((encRead(MACON1)==(MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS))&&(encRead(MACON2)==0x00))
253 1 { P12=0; //add1
254 2 }
255 1
256 1 // enable automatic padding and CRC operations //改，只能对ETH类进行位操作
257 1
258 1 encWrite(MACON3,MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN|MACON3_FULDPX);
259 1
260 1 // set inter-frame gap (non-back-to-back)
261 1 encWrite(MAIPGL, 0x12);
262 1 encWrite(MAIPGH, 0x0C);
263 1 // set inter-frame gap (back-to-back)
264 1 encWrite(MABBIPG, 0x12);
265 1 // Set the maximum packet size which the controller will accept
266 1 encWrite(MAMXFLL, MAX_FRAMELEN&0xFF);
267 1 encWrite(MAMXFLH, MAX_FRAMELEN>>8);
268 1
269 1 // do bank 3 stuff
270 1 // write MAC address
271 1 // NOTE: MAC address in ENC28J60 is byte-backward
272 1 nicSetMacAddress();
273 1
274 1 // no loopback of transmitted frames
275 1 encPhyWrite(PHCON2, PHCON2_HDLDIS);
276 1
277 1 encPhyWrite(PHCON1, PHCON1_PDPXMD);
278 1
279 1 encPhyWrite(PHLCON,0x07b0);
280 1
281 1 // switch to bank 0
282 1 encSetBank(ECON1);
283 1 encWrite(EIE,0x00);
284 1 encWrite(EIR,0x00);
285 1 // enable packet reception
286 1 encWriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
287 1 // Stop timer/ counter 0.
288 1 Timer0off();
289 1
290 1 // Set timer/ counter 0 as mode 1 16 bit timer.
291 1 // TMOD &= 0xF0;
292 1 TMOD |= 0x11;
293 1
294 1 // Preload for 0.5s periodic interrupt.
295 1 TH0 = ETH_T0_RELOAD >> 8;
296 1 TL0 = ETH_T0_RELOAD;
297 1
298 1 TH1 = ETH_T1_RELOAD >> 8;
299 1 TL1 = ETH_T1_RELOAD;
300 1
301 1 AUXR=0x00; //设置为12个时钟周期
302 1 //UART initialize add7
303 1 AUXR=AUXR|0x05;
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 6
304 1 BRT=RELOAD;
305 1 SCON=0x50;
306 1 PCON=0x00;
307 1 AUXR=AUXR|0x10; //启动计数
308 1 ES=1;
309 1 // Enable timer/ counter 0 overflow interrupt.
310 1 ET0 = 1;
311 1 ET1 = 1;
312 1 EA = 1;
313 1 }
314
315 /***********************发送接受函数********************/
316 void EthdevSPI_Sendpack(void)
317 {
318 1 INT8U len,leno;
319 1 INT8U *ptr;
320 1 EA=0;
321 1
322 1 ptr = uip_buf; //将指针指向发送数据的首地址
323 1
324 1 //是否要判断接受忙，发送未完成，DMA操作？
325 1 //写发送缓冲区首地址
326 1 encWrite(ETXSTL, TXSTART_INIT&0xFF);
327 1 encWrite(ETXSTH, TXSTART_INIT>>8);
328 1 // Set the write pointer to start of transmit buffer area
329 1 encWrite(EWRPTL, TXSTART_INIT);
330 1 encWrite(EWRPTH, TXSTART_INIT>>8);
331 1
332 1 len = UIP_TCPIP_HLEN + UIP_LLH_LEN; //UIP_LLH_LEN=14，UIP_TCPIP_HLEN=40
333 1
334 1 leno=uip_len - UIP_TCPIP_HLEN - UIP_LLH_LEN;
335 1
336 1 CS = 0;
337 1
338 1 SPDAT = ENC28J60_WRITE_BUF_MEM;
339 1 while(!(SPSTAT & SPSTAT_SPIF));
340 1 SPSTAT = 0xc0;
341 1
342 1 SPDAT = 0x0e; //包发送方式控制量，该控制量不存放在uip_buf中
343 1 while(!(SPSTAT & SPSTAT_SPIF));
344 1 SPSTAT = 0xC0; // 发送一个包控制字0e，确定发送方式为MACON3中设置
345 1
346 1 /****** 通过SPI口写进ENC28J60的缓冲区 UIP_LLH_LEN=14，UIP_TCPIP_HLEN=40 *****/
347 1 while(len--)
348 1 {
349 2 // write data
350 2 SPDAT = *ptr++;
351 2 while(!(SPSTAT & SPSTAT_SPIF));
352 2 SPSTAT = 0xC0;
353 2 }
354 1
355 1 ptr = (unsigned char *)uip_appdata; //指向应用数据区
356 1
357 1 while(leno--)
358 1 { // write data
359 2 SPDAT = *ptr++;
360 2 while(!(SPSTAT & SPSTAT_SPIF));
361 2 SPSTAT = 0xC0;
362 2 }
363 1 CS = 1;
364 1
365 1 // Set the TXND pointer to correspond to the packet size given
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 7
366 1 encWrite(ETXNDL, (TXSTART_INIT+uip_len));
367 1 encWrite(ETXNDH, (TXSTART_INIT+uip_len)>>8);
368 1
369 1 encWriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS); //ECON1.TXRTS=1,开发送请求位
370 1
371 1 EA=1;
372 1 }
373 /************************读缓冲器中数据****************************/
374
375 unsigned int EthdevSPI_read(void)
376 { INT8U i=0,*ptr;
377 1 INT16U tlen,rxstat;
378 1
379 1 // check if a packet has been received and buffered (encReadOp(ENC28J60_READ_CTRL_REG, EIR) & EIR_PKTI
-F)!=0)|| ||(encRead(EPKTCNT)==0)
380 1 if(encRead(EPKTCNT)>0)
381 1 { EA=0;
382 2 // encWriteOp(ENC28J60_BIT_FIELD_CLR, EIR, EIR_PKTIF); //清0
383 2
384 2 // Set the read pointer to the start of the received packet
385 2 encWrite(ERDPTL, (NextPacketPtr));
386 2 encWrite(ERDPTH, (NextPacketPtr)>>8);
387 2
388 2 // read the next packet pointer
389 2 NextPacketPtr = encReadOp(ENC28J60_READ_BUF_MEM, 0);
390 2 NextPacketPtr |= encReadOp(ENC28J60_READ_BUF_MEM, 0)<<8;
391 2
392 2 // read the packet length 接受状态字的内容
393 2 tlen = encReadOp(ENC28J60_READ_BUF_MEM, 0); //有效数据+填充+CRC
394 2 tlen |= encReadOp(ENC28J60_READ_BUF_MEM, 0)<<8;
395 2
396 2 tlen=tlen-4;
397 2 // read the receive status
398 2 rxstat = encReadOp(ENC28J60_READ_BUF_MEM, 0);
399 2 rxstat |= encReadOp(ENC28J60_READ_BUF_MEM, 0)<<8;
400 2
401 2 ptr = uip_buf;
402 2
403 2 if(tlen>UIP_BUFSIZE) //此包太大，将丢弃
404 2 {
405 3 P1=P1&0xfe; //add1
406 3 tlen = 0; //return 0; 错误
407 3 }
408 2 else{
409 3 encReadBuffer(tlen,ptr);
410 3 }
411 2 // Move the RX read pointer to the start of the next received packet
412 2 // This frees the memory we just read out 前移接收缓冲器读指针ERXRDPT
413 2 encWrite(ERXRDPTL, (NextPacketPtr));
414 2 encWrite(ERXRDPTH, (NextPacketPtr)>>8);
415 2 // decrement the packet counter indicate we are done with this packet
416 2 //encWrite(EPKTCNT,(encread(EPKTCNT)-1));
417 2 encWriteOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
418 2
419 2 EA=1;
420 2 }
421 1 else{
422 2 tlen=0;
423 2 }
424 1
425 1 return tlen;
426 1
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 8
427 1 }
428
429
430 static void etherdev_timer0_isr(void) interrupt 1 using 1
431 { struct uip_conn xdata *uip_connr_temp= uip_conn;
432 1 unsigned char xdata k;
433 1 Timer0off();
434 1 // Reload timer/ counter 0 for 0.1s periodic interrupt.
435 1 TH0 = ETH_T0_RELOAD >> 8;
436 1 TL0 = ETH_T0_RELOAD;
437 1 k++;
438 1 if(k>=40)
439 1 { k=0;
440 2 uip_connr_temp->timer--;
441 2 if(uip_connr_temp->timer==0) { Timer0off();
442 3 return;
443 3 }
444 2 }
445 1 Timer0on();
446 1 return;
447 1 }
448
449 static void etherdev_timer1_isr(void) interrupt 3 using 3
450 { struct datatrans_state *ts;
451 1 unsigned char xdata k;
452 1 ts = (struct datatrans_state xdata *)(uip_conn->appstate);
453 1 Timer1off();
454 1 TH1 = ETH_T1_RELOAD >> 8; //和k形成1s的延时
455 1 TL1 = ETH_T1_RELOAD;
456 1 k++;
457 1 if(k>=50)
458 1 { k=0;
459 2 // UARTtimer++;
460 2 tick_count++; //更新ARP表的
461 2 if(STAT_AB==1){
462 3 ts->count++; //连接时间计数
463 3 if(ts->count==ab_count) //不同s时延
464 3 return;
465 3 }
466 2 }
467 1 Timer1on();
468 1 return;
469 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1139 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- 2
PDATA SIZE = ---- ----
DATA SIZE = 3 9
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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