📄 enc28j60.lst
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C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 1
C51 COMPILER V8.08, COMPILATION OF MODULE ENC28J60
OBJECT MODULE PLACED IN enc28j60.OBJ
COMPILER INVOKED BY: D:\Keil\C51\BIN\C51.EXE enc28j60.c BROWSE DEBUG OBJECTEXTEND
line level source
1
2 #include "reg51.H"
3 #include "REGISTER.h"
4 #include "uip.h"
5 #include "uipopt.h"
6
7 //SPTCL寄存器
8 #define NUM 8
9 #define SPTCL_SSIG 0x80
10 #define SPTCL_SPEN 0x40
11 #define SPTCL_MSTR 0x10
12 #define SPTCL_CPOL 0x08
13 #define SPTCL_CPHA 0x04
14 #define SPTCL_SPR1 0x02
15 #define SPTCL_SPR0 0x01
16
17 //SPSTAT寄存器
18 #define SPSTAT_SPIF 0x80
19 #define SPSTAT_WCOL 0x40
20
21 sbit P10 = P1^0;
22 sbit P11 = P1^1; //add1
23 sbit P12 = P1^2; //add1
24 sbit CS = P1^3;
25 sbit SS = P1^4;
26
27 sfr BRT = 0x9c; //add7
28 #define RELOAD 0xF1
29
30 extern unsigned char xdata STAT_AB ; //ADD8
31
32 //extern unsigned char xdata UARTtimer;
33 extern unsigned char tick_count; //add7
34 extern unsigned char ab_count;
35
36 static unsigned int NextPacketPtr = 0;
37 static unsigned char Enc28j60Bank;
38 typedef unsigned int INT16U;
39 typedef unsigned char INT8U;
40
41 void delay_ms(unsigned char num) //延时num个毫秒
42 {unsigned char i,j;
43 1 if(num>1)
44 1 {for (i=0;i<200;i++)
45 2 for(j=0;j<200;j++);
46 2 num--;}
47 1 }
48
49
50 void init_SPI(void)
51 { P1M0 =0xb8;
52 1 P1M1 =0x40;
53 1 SS=1;
54 1 SPSTAT=0xC0;
55 1 SPCTL = SPTCL_SPEN | SPTCL_MSTR; //选择为主机模式，SPI使能，SPI 口只能工作在00模式下
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 2
56 1 }
57
58 void System_Reset(void)
59 { CS = 0;
60 1 // write data
61 1 SPDAT = ENC28J60_SOFT_RESET;
62 1 while(!(SPSTAT & SPSTAT_SPIF));
63 1 //SPSTAT&=~SPSTAT_SPIF;
64 1 SPSTAT=0xC0;
65 1 CS = 1;
66 1 }
67
68 /*==========================================================
69 // function: write data to addr
70 ==========================================================*/
71 void encWriteOp(unsigned char op,unsigned char addr,unsigned char outdata)
72 {
73 1 CS = 0;
74 1
75 1 // send write command
76 1 SPDAT = op | (addr & ADDR_MASK);
77 1 while(!(SPSTAT & SPSTAT_SPIF));
78 1 SPSTAT=0xC0; //写1的时候进行清零操作
79 1 // write data
80 1 SPDAT = outdata;
81 1 while(!(SPSTAT & SPSTAT_SPIF));
82 1 SPSTAT=0xC0;
83 1 CS = 1;
84 1 }
85
86 /*==========================================================
87 // function: read data from addr
88 ==========================================================*/
89 unsigned char encReadOp(unsigned char op,unsigned char addr)
90 {
91 1 unsigned char indata;
92 1
93 1 CS = 0;
94 1
95 1 // send read command
96 1 SPDAT = op | (addr & ADDR_MASK);
97 1 while(!(SPSTAT & SPSTAT_SPIF));
98 1 SPSTAT=0xC0;
99 1 // read data
100 1 SPDAT = 0x00;
101 1 while(!(SPSTAT & SPSTAT_SPIF));
102 1 SPSTAT=0xC0;
103 1 // do dummy read if needed
104 1 if(addr & 0x80)
105 1 {
106 2 SPDAT = 0x00;
107 2 while(!(SPSTAT & SPSTAT_SPIF));
108 2 SPSTAT=0xC0;
109 2 }
110 1 indata = SPDAT;
111 1
112 1 CS = 1;
113 1
114 1 return (indata);
115 1 }
116
117
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 3
118 /*==========================================================
119 // function: set enc28j60 register bank
120 ==========================================================*/
121 void encSetBank(unsigned char addr)
122 {
123 1 // set the bank (if needed)
124 1 if((addr & BANK_MASK) != Enc28j60Bank)
125 1 {
126 2 // clear the set
127 2 encWriteOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1|ECON1_BSEL0));
128 2 // set the bank
129 2 encWriteOp(ENC28J60_BIT_FIELD_SET, ECON1, (addr & BANK_MASK)>>5);
130 2 Enc28j60Bank = (addr & BANK_MASK);
131 2 }
132 1 }
133
134 /*==========================================================
135 // function: read regsiter
136 ==========================================================*/
137 unsigned char encRead(unsigned char addr)
138 {
139 1 // set the bank
140 1 encSetBank(addr);
141 1 // do the read
142 1 return encReadOp(ENC28J60_READ_CTRL_REG, addr);
143 1 }
144 /*==========================================================
145 // function: read data buffer form enc28j60
146 ==========================================================*/
147 void encReadBuffer(unsigned int temp_len,unsigned char *indata)
148 {
149 1 CS = 0;
150 1 // send read command
151 1 SPDAT = ENC28J60_READ_BUF_MEM;
152 1 while(!(SPSTAT & SPSTAT_SPIF));
153 1 SPSTAT = 0xC0;
154 1 while(temp_len--)
155 1 {
156 2 // read data
157 2 SPDAT = 0x00;
158 2 while(!(SPSTAT & SPSTAT_SPIF));
159 2 *indata++ = SPDAT;
160 2 SPSTAT = 0xC0;
161 2 }
162 1 CS = 1;
163 1 }
164 /*==========================================================
165 // function: write regsiter
166 ==========================================================*/
167 void encWrite(unsigned char addr,unsigned char outdata)
168 {
169 1 // set the bank
170 1 encSetBank(addr);
171 1 // do the write
172 1 encWriteOp(ENC28J60_WRITE_CTRL_REG, addr, outdata);
173 1 }
174
175 /*==========================================================
176 // function: set MAC address
177 ==========================================================*/
178 void nicSetMacAddress(void)
179 {
C51 COMPILER V8.08 ENC28J60 08/22/2008 14:32:50 PAGE 4
180 1 // write MAC address
181 1 // NOTE: MAC address in ENC28J60 is byte-backward
182 1 encWrite(MAADR0, UIP_ETHADDR5);
183 1 encWrite(MAADR1, UIP_ETHADDR4);
184 1 encWrite(MAADR2, UIP_ETHADDR3);
185 1 encWrite(MAADR3, UIP_ETHADDR2);
186 1 encWrite(MAADR4, UIP_ETHADDR1);
187 1 encWrite(MAADR5, UIP_ETHADDR0);
188 1 }
189 /*==========================================================
190 // function: write PHY regsiter
191 ==========================================================*/
192 void encPhyWrite(unsigned char addr, unsigned int outdata)
193 {
194 1 // set the PHY register address
195 1 encWrite(MIREGADR, addr);
196 1
197 1 // write the PHY data
198 1 encWrite(MIWRL, outdata);
199 1 encWrite(MIWRH, outdata>>8);
200 1 // wait until the PHY write completes
201 1 while(encRead(MISTAT) & MISTAT_BUSY);
202 1
203 1 }
204 /*==========================================================
205 // function: chip init
206 ==========================================================*/
207 void encInit(void)
208 {
209 1 // initialize I/O
210 1
211 1 init_SPI();
212 1
213 1
214 1 // perform system reset
215 1 System_Reset();
216 1 // check CLKRDY bit to see if reset is complete
217 1 delay_ms(NUM);
218 1
219 1 while(!(encRead(ESTAT) & ESTAT_CLKRDY));
220 1
221 1 // do bank 0 stuff
222 1 // initialize receive buffer
223 1 // 16-bit transfers, must write low byte first
224 1 // set receive buffer start address
225 1 encWrite(ERXSTL, RXSTART_INIT&0xFF);
226 1 encWrite(ERXSTH, RXSTART_INIT>>8);
227 1 // set receive pointer address
228 1 encWrite(ERXRDPTL, RXSTART_INIT&0xFF);
229 1 encWrite(ERXRDPTH, RXSTART_INIT>>8);
230 1 // set receive buffer end
231 1 // ERXND defaults to 0x1FFF (end of ram)
232 1 encWrite(ERXNDL, RXSTOP_INIT&0xFF);
233 1 encWrite(ERXNDH, RXSTOP_INIT>>8);
234 1
235 1 //set send buffer end
236 1 encWrite(ETXNDL,RXSTART_INIT&0xFF);
237 1 encWrite(ETXNDH,RXSTART_INIT>>8);
238 1
239 1 if(encRead(ERXNDL)==0xff) //add1
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