sysctrl.c

2812 开发库

} // end InitEv()


/**********************************************************************
* Function: InitPieCtrl()
*
* Description: Initializes and enables the PIE interrupts on the F281x.
**********************************************************************/
void InitPieCtrl(void)
{
/*** Disable interrupts ***/
	asm(" SETC INTM, DBGM");			// Disable global interrupts

/*** Initialize the PIE_RAM ***/
	PieCtrlRegs.PIECRTL.bit.ENPIE = 0;	// Disable the PIE
	asm(" EALLOW");						// Enable EALLOW protected register access
	memcpy(&PieVectTable, &PieVectTableInit, 256);
	asm(" EDIS");						// Disable EALLOW protected register access

/*** Disable all PIE interrupts ***/
	PieCtrlRegs.PIEIER1.all =  0x0000;
	PieCtrlRegs.PIEIER2.all =  0x0000;
	PieCtrlRegs.PIEIER3.all =  0x0000;
	PieCtrlRegs.PIEIER4.all =  0x0000;
	PieCtrlRegs.PIEIER5.all =  0x0000;
	PieCtrlRegs.PIEIER6.all =  0x0000;
	PieCtrlRegs.PIEIER7.all =  0x0000;
	PieCtrlRegs.PIEIER8.all =  0x0000;
	PieCtrlRegs.PIEIER9.all =  0x0000;
	PieCtrlRegs.PIEIER10.all = 0x0000;
	PieCtrlRegs.PIEIER11.all = 0x0000;
	PieCtrlRegs.PIEIER12.all = 0x0000;

/*** Clear any potentially pending PIEIFR flags ***/
	PieCtrlRegs.PIEIFR1.all  = 0x0000;
	PieCtrlRegs.PIEIFR2.all  = 0x0000;
	PieCtrlRegs.PIEIFR3.all  = 0x0000;	
	PieCtrlRegs.PIEIFR4.all  = 0x0000;
	PieCtrlRegs.PIEIFR5.all  = 0x0000;
	PieCtrlRegs.PIEIFR6.all  = 0x0000;
	PieCtrlRegs.PIEIFR7.all  = 0x0000;
	PieCtrlRegs.PIEIFR8.all  = 0x0000;
	PieCtrlRegs.PIEIFR9.all  = 0x0000;
	PieCtrlRegs.PIEIFR10.all = 0x0000;
	PieCtrlRegs.PIEIFR11.all = 0x0000;
	PieCtrlRegs.PIEIFR12.all = 0x0000;

/*** Acknowlege all PIE interrupt groups ***/
	PieCtrlRegs.PIEACK.all = 0xFFFF;

/*** Enable the PIE ***/
	PieCtrlRegs.PIECRTL.bit.ENPIE = 1;		// Enable the PIE

} //end of InitPieCtrl()

/**********************************************************************
* Function: InitAdc()
*
* Description: Initializes the ADC on the F281x.
**********************************************************************/
void InitAdc(void)
{

/*** Reset the ADC module ***/
	AdcRegs.ADCTRL1.bit.RESET = 1;		// Reset the ADC module
	asm(" RPT #10 || NOP");			// Must wait 12-cycles (worst-case) for ADC reset to take effect
	
/*** Must follow the proper ADC power-up sequence ***/
	AdcRegs.ADCTRL3.all = 0x00C8;		// first power-up ref and bandgap circuits
/*
 bit 15-8      0's:    reserved
 bit 7         1:      ADCRFDN, reference power, 1=power on
 bit 6         1:      ADCBGDN, bandgap power, 1=power on
 bit 5         0:      ADCPWDN, main ADC power, 1=power on
 bit 4-1       0100:   ADCCLKPS, clock prescaler, FCLK=HSPCLK/(2*ADCCLKPS)
 bit 0         0:      SMODE_SEL, 0=sequential sampling, 1=simultaneous sampling
*/

	DelayUs(7000);						// Wait 7ms before setting ADCPWDN
	AdcRegs.ADCTRL3.bit.ADCPWDN = 1;	// Set ADCPWDN=1 to power main ADC
	DelayUs(20);						// Wait 20us before using the ADC

/*** Configure the other ADC register ***/
	AdcRegs.ADCMAXCONV.all = 0x0005;
/*
 bit 15-7      0's:    reserved
 bit 6-4       000:    MAX_CONV2 value
 bit 3-0       0005:   MAX_CONV1 value (5 means 6 conversion)
*/

	AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0;	// Convert Channel 0
	AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 1;	// Convert Channel 1
	AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 2;	// Convert Channel 2
	AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 3;	// Convert Channel 3
	AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 4;	// Convert Channel 4
	AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 5;	// Convert Channel 5

	AdcRegs.ADCTRL1.all = 0x0710;
/*
 bit 15        0:      reserved
 bit 14        0:      RESET, 0=no action, 1=reset ADC
 bit 13-12     00:     SUSMOD, 00=ignor emulation suspend
 bit 11-8      0111:   ACQ_PS (Acquisition), 0111 = 8 x ADCCLK
 bit 7         0:      CPS (Core clock), 0: ADCCLK=FCLK/1, 1: ADCCLK=FCLK/2
 bit 6         0:      CONT_RUN, 0=start/stop mode, 1=continuous run
 bit 5         0:      SEQ_OVRD, 0=disabled, 1=enabled
 bit 4         1:      SEQ_CASC, 0=dual sequencer, 1=cascaded sequencer
 bit 3-0       0000:   reserved
*/

	AdcRegs.ADCTRL2.all = 0x0900;
/*
 bit 15        0:      EVB_SOC_SEQ, 0=no action
 bit 14        0:      RST_SEQ1, 0=no action
 bit 13        0:      SOC_SEQ1, 0=clear any pending SOCs
 bit 12        0:      reserved
 bit 11        1:      INT_ENA_SEQ1, 1=enable interrupt
 bit 10        0:      INT_MOD_SEQ1, 0=int on every SEQ1 conv
 bit 9         0:      reserved
 bit 8         1:      EVA_SOC_SEQ1, 1=SEQ1 start from EVA
 bit 7         0:      EXT_SOC_SEQ1, 1=SEQ1 start from ADCSOC pin
 bit 6         0:      RST_SEQ2, 0=no action
 bit 5         0:      SOC_SEQ2, no effect in cascaded mode
 bit 4         0:      reserved
 bit 3         0:      INT_ENA_SEQ2, 0=int disabled
 bit 2         0:      INT_MOD_SEQ2, 0=int on every other SEQ2 conv
 bit 1         0:      reserved
 bit 0         0:      EVB_SOC_SEQ2, 1=SEQ2 started by EVB
*/

} // end AdcInit()


/**********************************************************************
* Function: InitSci()
*
* Description: 
**********************************************************************/

void InitSci()
{    
    // Note: Clocks were turned on in the InitSysCtrl() function
    
        /* SciA  RS232*/
 	SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback 
                                   // No parity,8 char bits,
                                   // async mode, idle-line protocol
	SciaRegs.SCICTL1.all =0x0003;  
//	SciaRegs.SCICTL2.bit.TXINTENA =1;   // enable TX interrupts
//	SciaRegs.SCICTL2.bit.RXBKINTENA =1; // enable RX interrupts
    SciaRegs.SCIHBAUD    =0x0000;       // 487(1E7)-9600, 976(3D0)-4800
    SciaRegs.SCILBAUD    =0x00F3;       // 243(F3)-19200
//	SciaRegs.SCICCR.bit.LOOPBKENA =1;   // Enable loop back  

    SciaRegs.SCIFFTX.all=0xC040;        // Init  FIFO  
    SciaRegs.SCIFFRX.all=0x004f;
    SciaRegs.SCIFFCT.all=0x0;

	SciaRegs.SCICTL1.all =0x0023;       // Relinquish SCI from Reset 
    SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
    SciaRegs.SCIFFRX.bit.RXFIFORESET=1;	 


        /* SciB  RS485*/
 	ScibRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback 
                                   // No parity,8 char bits,
                                   // async mode, idle-line protocol
	ScibRegs.SCICTL1.all =0x0003;  
//	ScibRegs.SCICTL2.bit.TXINTENA =1;   // enable TX interrupts
//	ScibRegs.SCICTL2.bit.RXBKINTENA =1; // enable RX interrupts
    ScibRegs.SCIHBAUD    =0x0001;       // 487(1E7)-9600, 976(3D0)-4800
    ScibRegs.SCILBAUD    =0x00E7;       // 243(F3)-19200

    ScibRegs.SCIFFTX.all=0xC040;        // Init  FIFO  
    ScibRegs.SCIFFRX.all=0x004f;
    ScibRegs.SCIFFCT.all=0x0;

	ScibRegs.SCICTL1.all =0x0023;       // Relinquish SCI from Reset 
    ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
    ScibRegs.SCIFFRX.bit.RXFIFORESET=1;	 
    TR_485 = 0;                         // Enable 485 receive
}

/**********************************************************************
* Function: InitSpi()
*
* Description: 
**********************************************************************/
void InitSpi()
{
	SpiaRegs.SPIFFTX_REG.all = 0xE040;	
	SpiaRegs.SPIFFRX_REG.all = 0x204F;
	SpiaRegs.SPIFFCT_REG.all = 0x0;
	SpiaRegs.SPICCR_REG.all = 0x0B;		//复位SPI，12位数据，上升沿接收
	SpiaRegs.SPIBRR = 19;	// 波特率1.8MHz
	SpiaRegs.SPICTL = 0x0E;						//有延时，主模式，允许发送，禁止中断
	SpiaRegs.SPICCR_REG.bit.SPISWRESET = 1;	//取消复位				
}




/******************************************SPIFLASH*************************************/
uchar flash_buff[528];

void SPI_Reset(void)
{
     RSFLASH = 0;
     DelayUs(2000); 
     RSFLASH = 1;
}

void SPI_WriteByte(uchar datum)
{
     IODD0 = 0;
     SpiaResg.SPIXBUF = datum;
     IODD0 = 1;
}

uchar SPI_ReadByte(void)
{    
     uchar datum=0;
     while(SpiaRegs.SPIFFRX.bit.RXFFST !=1) 
     {}
     datum= SpiaRegs.SPIRXBUF;
     return datum;
}

void PageErase(uint page)
{
     WriteFlash(PAGE_ERASE,page);
}

uchar ReadSatausReg(void)
{
     uchar reg;
     IODD0 = 0;
     SPI_WriteByte(STATUS_REG);
     reg=SPI_ReadByte();
     IODD0 = 1;
     return reg;
}

void WriteFlash(uchar mode,uint addr)
{
     uchar tmp;
     IODD0 =0;
     addr <<= 2;
     tmp=(addr/0x100);
     tmp &= 0x3F;
     SPI_WriteByte(mode);
     SPI_WriteByte(tmp);
     tmp =addr%0x100;
     SPI_WriteByte(tmp);
     SPI_WriteByte(0);
     IODD0 = 1;	
}

void ReadFlash(uchar mode,uint addr)
{
     uchar i;
     uchar tmp;
     
     IODD0 =0;
     addr <<= 2;
     tmp=(addr/0x100);
     tmp &= 0x3F;
     SPI_WriteByte(mode);
     SPI_WriteByte(tmp);
     tmp =addr%0x100;
     SPI_WriteByte(tmp);
     SPI_WriteByte(0);
     IODD0 = 1;	
}

void ReadFlashBuffer(uint page)
{
     uint i;
     ReadFlash(MEMP_BUFFER1,page);
     DelayUs(1000);
     
     IODD0 =0;
     SPI_WriteByte(READ_BUFFER1);
     SPI_WriteByte(0);
     SPI_WriteByte(0);
     SPI_WriteByte(0);
     SPI_WriteByte(0);
     for(i=0;i<528;i++)flash_buff[i]=SPI_ReadByte();
     IODD0 = 1;	
}

void WriteFlashBuffer(uint page)//"将flash_buff[]内的528字节进入指定页地址"
{
     uint i;
     IODD0 =0;
     SPI_WriteByte(WRITEBUFFER1);
     SPI_WriteByte(0);
     SPI_WriteByte(0);
     SPI_WriteByte(0);
     for(i=0;i<528;i++)SPI_WriteByte(flash_buff[i]);
     IODD0 = 1;	
     
     WriteFlash(BUF1_MEMP_ER,page);
     DelayUs(2000); 
}

/**********************************************************************
* Function: InitMcBSP()
* TLC2578 选用MODE 00，FS启动转换
* Description: 
**********************************************************************/
void InitMcBSP()
{
	McbspaRegs.MFFTX.all = 0x0000;			//禁止FIFO功能	
	
	
	McbspaRegs.SPCR2.all = 0x0000;			//发送器复位，采样率产生器复位，帧同步产生器复位
	McbspaRegs.SPCR1.all = 0x0000;	    //接收器复位
	McbspaRegs.PCR2.all = 0x0;
	McbspaRegs.PCR1.all = 0x0;
	McbspaRegs.XCR2.all = 0x0;
	McbspaRegs.XCR1.all = 0x0;
	
	McbspaRegs.PCR.bit.SCLKME = 0;			//内部时钟LSPCLK
	McbspaRegs.SRGR2.bit.CLKSM = 1;
	
	
	McbspaRegs.MCR2.all = 0x0;
	McbspaRegs.MCR1.all = 0x0;
	
	McbspaRegs.PCR.bit.FSXM =0;							//接收帧同步信号由外部产生
	McbspaRegs.PCR.bit.FSRM =1;							//发送帧同步信号由内部产生
	McbspaRegs.PCR.bit.CLKXM = 1;						//McBSP 为主设备，产生发送时钟
	McbspaRegs.PCR.bit.CLDRM = 0;						//DLB =0；CLKR作为输入引脚，由外部时钟驱动
	McbspaRegs.PCR.bit.CLKXP =0;						//发送数据在CLKX上升沿被采集
	McbspaRegs.PCR.bit..CLKRP = 0;					//接收数据在CLKR上升沿被采集
	
		
	McbspaRegs.SPCR1.bit.RJUST = 0;
	McbspaRegs.SRGR2.bit.FSGM = 1;			
	McbspaRegs.SRGR2.bit.FPER = 31;			//帧周期
	McbspaRegs.SRGR1.bit.CLKGDV = 3;		//采样速率生成器分频系数3
	McbspaRegs.SRGR1.bit.FWID = 3;			//帧同步脉冲宽度
	McbspaRegs.RCR2.bit.RCOMPAND = 0;		
	McbspaRegs.RCR2.bit.RDATDLY = 0;
	McbspaRegs.XCR2.bit.XCOMPAND = 0;
	McbspaRegs.XCR2.bit.XDATDLY = 0;
	McbspaRegs.RCR1.bit.RWDLEN1 = 3;		//16位接收字
	McbspaRegs.XCR2.bit.XWDLEN1 = 3;		//16位发送字
	
	McbspaRegs.SPCR2.bit.XRST = 1;  
	McbspaRegs.SPCR1.bit.RRST = 1;
	McbspaRegs.SPCR2.bit.GRST= 	1;
	McbspaRegs.SPCR2.bit.FRST = 1;	
}

void mcbsp_xmit(int a)								
{
	
	 McbspaRegs.DXR1.all = a;
	 while(McbspaRegs.SPCR2.bit.XRDY == 0){}
}

void XACinit()
{
	GpioDataRegs.GPDCLEAR.all = 0x0020;			//2578 cs=0;
	mcbsp_xmit(SETDEFAULT);	
}

/*** end of file *****************************************************/