sysctrl.asm

2812 开发库

;----------------------------------------------------------------------
        OR        @_FlashRegs+4,#0x00ff ; |111| 
	.line	7
;----------------------------------------------------------------------
; 112 | FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF;  // Standby to active tr
;     | ansition cycles                                                        
;----------------------------------------------------------------------
        OR        @_FlashRegs+5,#0x00ff ; |112| 
	.line	8
;----------------------------------------------------------------------
; 113 | FlashRegs.FBANKWAIT.bit.RANDWAIT = 5;                   // Random acces
;     | s waitstates                                                           
;----------------------------------------------------------------------
        AND       AL,@_FlashRegs+6,#0xfff0 ; |113| 
        ORB       AL,#0x05              ; |113| 
        MOV       @_FlashRegs+6,AL      ; |113| 
	.line	9
;----------------------------------------------------------------------
; 114 | FlashRegs.FBANKWAIT.bit.PAGEWAIT = 5;                   // Paged access
;     |  waitstates                                                            
;----------------------------------------------------------------------
        AND       AL,@_FlashRegs+6,#0xf0ff ; |114| 
        OR        AL,#0x0500            ; |114| 
        MOV       @_FlashRegs+6,AL      ; |114| 
	.line	10
;----------------------------------------------------------------------
; 115 | FlashRegs.FOTPWAIT.bit.OTPWAIT = 5;                             // Rand
;     | om access waitstates                                                   
;----------------------------------------------------------------------
        AND       AL,@_FlashRegs+7,#0xffe0 ; |115| 
        ORB       AL,#0x05              ; |115| 
        MOV       @_FlashRegs+7,AL      ; |115| 
	.line	11
;----------------------------------------------------------------------
; 116 | FlashRegs.FOPT.bit.ENPIPE = 1;                                  // Enab
;     | le the flash pipeline                                                  
;----------------------------------------------------------------------
        OR        @_FlashRegs,#0x0001   ; |116| 
	.line	12
;----------------------------------------------------------------------
; 117 | asm(" EDIS");
;     |          // Disable EALLOW protected register access                   
;----------------------------------------------------------------------
 EDIS
	.line	17
;----------------------------------------------------------------------
; 122 | asm(" RPT #8 || NOP");                                                 
;----------------------------------------------------------------------
 RPT #8 || NOP
	.line	19
;----------------------------------------------------------------------
; 124 | } //end of InitFlash()                                                 
;----------------------------------------------------------------------
        LRETR
        ; return occurs
	.endfunc	124,000000000h,0



	.sect	".text"
	.global	_InitXintf
	.sym	_InitXintf,_InitXintf, 32, 2, 0
	.func	132
;----------------------------------------------------------------------
; 132 | void InitXintf(void)                                                   
;----------------------------------------------------------------------

;***************************************************************
;* FNAME: _InitXintf                    FR SIZE:   0           *
;*                                                             *
;* FUNCTION ENVIRONMENT                                        *
;*                                                             *
;* FUNCTION PROPERTIES                                         *
;*                            0 Parameter,  0 Auto,  0 SOE     *
;***************************************************************

_InitXintf:
	.line	2
	.line	5
;----------------------------------------------------------------------
; 136 | XintfRegs.XINTCNF2.bit.XTIMCLK = 0;                     // XTIMCLK=SYSC
;     | LKOUT/1                                                                
;----------------------------------------------------------------------
        MOVW      DP,#_XintfRegs+21
        AND       @_XintfRegs+21,#0xfff8 ; |136| 
	.line	6
;----------------------------------------------------------------------
; 137 | XintfRegs.XINTCNF2.bit.CLKOFF = 0;                      // XCLKOUT is e
;     | nabled                                                                 
;----------------------------------------------------------------------
        AND       @_XintfRegs+20,#0xfff7 ; |137| 
	.line	7
;----------------------------------------------------------------------
; 138 | XintfRegs.XINTCNF2.bit.CLKMODE = 0;                     // XCLKOUT = XT
;     | IMCLK                                                                  
; 140 | // Make sure write buffer is empty before configuring buffering depth  
;----------------------------------------------------------------------
        AND       @_XintfRegs+20,#0xfffb ; |138| 
	.line	10
;----------------------------------------------------------------------
; 141 | while(XintfRegs.XINTCNF2.bit.WLEVEL != 0);      // poll the WLEVEL bit 
;----------------------------------------------------------------------
L1:    
        AND       AL,@_XintfRegs+20,#0x00c0 ; |141| 
        LSR       AL,6                  ; |141| 
        BF        L1,NEQ                ; |141| 
        ; branch occurs ; |141| 
	.line	11
;----------------------------------------------------------------------
; 142 | XintfRegs.XINTCNF2.bit.WRBUFF = 0;                      // No write buf
;     | fering                                                                 
; 145 | // Example: Assume Zone 2 is slow, so add additional BCYC cycles whenev
;     | er                                                                     
; 146 | // switching from Zone 2 to another Zone.  This will help avoid bus con
;     | tention.                                                               
;----------------------------------------------------------------------
        AND       @_XintfRegs+20,#0xfffc ; |142| 
	.line	16
;----------------------------------------------------------------------
; 147 | XintfRegs.XBANK.bit.BCYC = 7;                           // Add 7 cycles
;----------------------------------------------------------------------
        OR        @_XintfRegs+24,#0x001c ; |147| 
	.line	17
;----------------------------------------------------------------------
; 148 | XintfRegs.XBANK.bit.BANK = 2;                           // select zone
;     | 2                                                                      
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+24,#0xfffc ; |148| 
        ORB       AL,#0x02              ; |148| 
        MOV       @_XintfRegs+24,AL     ; |148| 
	.line	24
;----------------------------------------------------------------------
; 155 | XintfRegs.XTIMING2.bit.X2TIMING = 1;    // Timing scale factor = 2     
;----------------------------------------------------------------------
        OR        @_XintfRegs+5,#0x0040 ; |155| 
	.line	25
;----------------------------------------------------------------------
; 156 | XintfRegs.XTIMING2.bit.XSIZE = 3;               // Always write as 11b 
;----------------------------------------------------------------------
        OR        @_XintfRegs+5,#0x0003 ; |156| 
	.line	26
;----------------------------------------------------------------------
; 157 | XintfRegs.XTIMING2.bit.READYMODE = 1;   // XREADY is asynchronous      
;----------------------------------------------------------------------
        OR        @_XintfRegs+4,#0x8000 ; |157| 
	.line	27
;----------------------------------------------------------------------
; 158 | XintfRegs.XTIMING2.bit.USEREADY = 0;        // Disable XREADY          
;----------------------------------------------------------------------
        AND       @_XintfRegs+4,#0xbfff ; |158| 
	.line	28
;----------------------------------------------------------------------
; 159 | XintfRegs.XTIMING2.bit.XRDLEAD = 1;             // Read lead time      
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+4,#0xcfff ; |159| 
        OR        AL,#0x1000            ; |159| 
        MOV       @_XintfRegs+4,AL      ; |159| 
	.line	29
;----------------------------------------------------------------------
; 160 | XintfRegs.XTIMING2.bit.XRDACTIVE = 7;   // Read active time            
;----------------------------------------------------------------------
        OR        @_XintfRegs+4,#0x0e00 ; |160| 
	.line	30
;----------------------------------------------------------------------
; 161 | XintfRegs.XTIMING2.bit.XRDTRAIL = 1;    // Read trail time             
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+4,#0xfe7f ; |161| 
        ORB       AL,#0x80              ; |161| 
        MOV       @_XintfRegs+4,AL      ; |161| 
	.line	31
;----------------------------------------------------------------------
; 162 | XintfRegs.XTIMING2.bit.XWRLEAD = 1;             // Write lead time     
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+4,#0xff9f ; |162| 
        ORB       AL,#0x20              ; |162| 
        MOV       @_XintfRegs+4,AL      ; |162| 
	.line	32
;----------------------------------------------------------------------
; 163 | XintfRegs.XTIMING2.bit.XWRACTIVE = 7;   // Write active time           
;----------------------------------------------------------------------
        OR        @_XintfRegs+4,#0x001c ; |163| 
	.line	33
;----------------------------------------------------------------------
; 164 | XintfRegs.XTIMING2.bit.XWRTRAIL = 1;    // Write trail time            
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+4,#0xfffc ; |164| 
        ORB       AL,#0x01              ; |164| 
        MOV       @_XintfRegs+4,AL      ; |164| 
	.line	36
;----------------------------------------------------------------------
; 167 | XintfRegs.XTIMING6.bit.X2TIMING = 0;    // Timing scale factor = 1     
;----------------------------------------------------------------------
        AND       @_XintfRegs+13,#0xffbf ; |167| 
	.line	37
;----------------------------------------------------------------------
; 168 | XintfRegs.XTIMING6.bit.XSIZE = 3;               // Always write as 11b 
;----------------------------------------------------------------------
        OR        @_XintfRegs+13,#0x0003 ; |168| 
	.line	38
;----------------------------------------------------------------------
; 169 | XintfRegs.XTIMING6.bit.READYMODE = 1;   // XREADY is asynchronous      
;----------------------------------------------------------------------
        OR        @_XintfRegs+12,#0x8000 ; |169| 
	.line	39
;----------------------------------------------------------------------
; 170 | XintfRegs.XTIMING6.bit.USEREADY = 0;    // Disable XREADY              
;----------------------------------------------------------------------
        AND       @_XintfRegs+12,#0xbfff ; |170| 
	.line	40
;----------------------------------------------------------------------
; 171 | XintfRegs.XTIMING6.bit.XRDLEAD = 1;             // Read lead time      
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+12,#0xcfff ; |171| 
        OR        AL,#0x1000            ; |171| 
        MOV       @_XintfRegs+12,AL     ; |171| 
	.line	41
;----------------------------------------------------------------------
; 172 | XintfRegs.XTIMING6.bit.XRDACTIVE = 2;   // Read active time            
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+12,#0xf1ff ; |172| 
        OR        AL,#0x0400            ; |172| 
        MOV       @_XintfRegs+12,AL     ; |172| 
	.line	42
;----------------------------------------------------------------------
; 173 | XintfRegs.XTIMING6.bit.XRDTRAIL = 0;    // Read trail time             
;----------------------------------------------------------------------
        AND       @_XintfRegs+12,#0xfe7f ; |173| 
	.line	43
;----------------------------------------------------------------------
; 174 | XintfRegs.XTIMING6.bit.XWRLEAD = 1;             // Write lead time     
;----------------------------------------------------------------------
        AND       AL,@_XintfRegs+12,#0xff9f ; |174| 
        ORB       AL,#0x20              ; |174| 
        MOV       @_XintfRegs+12,AL     ; |174| 
	.line	44
;----------------------------------------------------------------------
; 175 | XintfRegs.XTIMING6.bit.XWRACTIVE = 2;   // Write active time           
;----------------------------------------------------------------------