ub.tcl

usb-blaster

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.

# Quartus II: Generate Tcl File for Project
# File: ub.tcl
# Generated on: Fri Sep 14 18:47:26 2007

# Load Quartus II Tcl Project package
package require ::quartus::project

set need_to_close_project 0
set make_assignments 1

# Check that the right project is open
if {[is_project_open]} {
	if {[string compare $quartus(project) "ub"]} {
		puts "Project ub is not open"
		set make_assignments 0
	}
} else {
	# Only open if not already open
	if {[project_exists ub]} {
		project_open -revision ub ub
	} else {
		project_new -revision ub ub
	}
	set need_to_close_project 1
}

# Make assignments
if {$make_assignments} {
	set_global_assignment -name DEVICE EPM240T100C5
	set_global_assignment -name FAMILY "MAX II"
	set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.0
	set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:06:00  SEPTEMBER 14, 2007"
	set_global_assignment -name LAST_QUARTUS_VERSION 7.0
	set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
	set_global_assignment -name EDA_INCLUDE_VHDL_CONFIGURATION_DECLARATION ON -section_id eda_simulation
	set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
	set_global_assignment -name VHDL_FILE ub.vhd
	set_location_assignment PIN_2 -to B_OE
	set_location_assignment PIN_12 -to CLK
	set_location_assignment PIN_75 -to D[0]
	set_location_assignment PIN_72 -to D[1]
	set_location_assignment PIN_73 -to D[2]
	set_location_assignment PIN_68 -to D[3]
	set_location_assignment PIN_74 -to D[4]
	set_location_assignment PIN_70 -to D[5]
	set_location_assignment PIN_69 -to D[6]
	set_location_assignment PIN_71 -to D[7]
	
	set_location_assignment PIN_57 -to nRD
	set_location_assignment PIN_56 -to WR
	set_location_assignment PIN_55 -to nRXF
	set_location_assignment PIN_54 -to nTXE
	
	set_location_assignment PIN_26 -to B_NCE
	set_location_assignment PIN_27 -to B_NCS
	set_location_assignment PIN_35 -to B_ASDO
	set_location_assignment PIN_36 -to B_TCK
	set_location_assignment PIN_28 -to B_TDI
	set_location_assignment PIN_34 -to B_TDO
	set_location_assignment PIN_37 -to B_TMS

	# Commit assignments
	export_assignments

	# Close project
	if {$need_to_close_project} {
		project_close
	}
}