dds.fit.qmsg

经过仿真验证的

{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.875 ns memory memory " "Info: Estimated most critical path is memory to memory delay of 2.875 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_rom0:u6\|altsyncram:altsyncram_component\|altsyncram_l5s:auto_generated\|ram_block1a0~porta_address_reg0 1 MEM M4K_X15_Y20 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X15_Y20; Fanout = 1; MEM Node = 'lpm_rom0:u6\|altsyncram:altsyncram_component\|altsyncram_l5s:auto_generated\|ram_block1a0~porta_address_reg0'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DDS" "UNKNOWN" "V1" "C:/Documents and Settings/yeping/桌面/DDS/db/DDS.quartus_db" { Floorplan "C:/Documents and Settings/yeping/桌面/DDS/" "" "" { lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a0~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_l5s.tdf" "" { Text "C:/Documents and Settings/yeping/桌面/DDS/db/altsyncram_l5s.tdf" 43 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.875 ns) 2.875 ns lpm_rom0:u6\|altsyncram:altsyncram_component\|altsyncram_l5s:auto_generated\|q_a\[0\] 2 MEM M4K_X15_Y20 1 " "Info: 2: + IC(0.000 ns) + CELL(2.875 ns) = 2.875 ns; Loc. = M4K_X15_Y20; Fanout = 1; MEM Node = 'lpm_rom0:u6\|altsyncram:altsyncram_component\|altsyncram_l5s:auto_generated\|q_a\[0\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DDS" "UNKNOWN" "V1" "C:/Documents and Settings/yeping/桌面/DDS/db/DDS.quartus_db" { Floorplan "C:/Documents and Settings/yeping/桌面/DDS/" "" "2.875 ns" { lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a0~porta_address_reg0 lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[0] } "NODE_NAME" } "" } } { "db/altsyncram_l5s.tdf" "" { Text "C:/Documents and Settings/yeping/桌面/DDS/db/altsyncram_l5s.tdf" 40 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.875 ns ( 100.00 % ) " "Info: Total cell delay = 2.875 ns ( 100.00 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "DDS" "UNKNOWN" "V1" "C:/Documents and Settings/yeping/桌面/DDS/db/DDS.quartus_db" { Floorplan "C:/Documents and Settings/yeping/桌面/DDS/" "" "2.875 ns" { lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a0~porta_address_reg0 lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[0] } "NODE_NAME" } "" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Info: Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." {  } {  } 0 0 "Design uses memory blocks. Violating setup or hold times of memory block address registers could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon May 28 15:59:51 2007 " "Info: Processing ended: Mon May 28 15:59:51 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}