dds.tan.rpt

来自「经过仿真验证的」· RPT 代码 · 共 235 行 · 第 1/5 页

; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg3 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg4 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg5 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg6 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg7 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg8 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg9 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[6]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg0 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg1 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg2 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg3 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg4 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg5 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg6 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg7 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg8 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a3~porta_address_reg9 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[3]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg0 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg1 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg2 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg3 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg4 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg5 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg6 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg7 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg8 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg9 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[2]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg0 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg1 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg2 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg3 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg4 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg5 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg6 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg7 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg8 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg9 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[4]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg0 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg1 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg2 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg3 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg4 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg5 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg6 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg7 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg8 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;
; N/A   ; 290.87 MHz ( period = 3.438 ns )               ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|ram_block1a1~porta_address_reg9 ; lpm_rom0:u6|altsyncram:altsyncram_component|altsyncram_l5s:auto_generated|q_a[8]                          ; CLK        ; CLK      ; None                        ; None                      ; 2.875 ns                ;