tstrsinv.m

数字通信第四版原书的例程

new_system([sys,'/',['Integer sequence',13,'RS encode/Register-shift']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],'Location',[237,587,592,717])

add_block('built-in/Demux',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/Demux']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/Demux']],...
		'outputs','[len_rg, 1]',...
		'position',[260,55,300,90])

add_block('built-in/S-Function',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/S-function']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/S-function']],...
		'function name','regshift',...
		'parameters','shft_out, thrhld',...
		'position',[150,65,200,85])

add_block('built-in/Mux',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/Mux']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/Mux']],...
		'inputs','2',...
		'position',[80,56,115,89])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/out_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/out_1']],...
		'position',[330,55,350,75])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/out_2']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/out_2']],...
		'Port','2',...
		'position',[330,70,350,90])

add_block('built-in/Inport',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/in_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/in_1']],...
		'position',[30,55,50,75])

add_block('built-in/Inport',[sys,'/',['Integer sequence',13,'RS encode/Register-shift/in_2']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift/in_2']],...
		'Port','2',...
		'position',[30,70,50,90])
add_line([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],[120,75;145,75])
add_line([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],[205,75;255,75])
add_line([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],[305,65;325,65])
add_line([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],[305,80;325,80])
add_line([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],[55,65;75,65])
add_line([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],[55,80;75,80])
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],...
		'Mask Display','Register\nshift',...
		'Mask Type','Register-shift')
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],...
		'Mask Dialogue','Store and shift the input from 1st port by raising edge of the pulse from second port.|Vector specify ouput delay length(non-negative integer):|Threshold for the pulse signal from the 2nd port:')
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],...
		'Mask Translate','shft_out=@1; thrhld=@2; len_rg=length(@1);')
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],...
		'Mask Help','This block store the 1st inport signal at the raising edge of 2nd inport pulse. The 1st outport outputs a vector with its size same as the the size of the 1st entree of this block. The maximum delay is the register size of this block. The second outport output a positive pulse at the begining of entire register refreshment.')
set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],...
		'Mask Entries','[k:-1:1]\/.1\/')


%     Finished composite block ['Integer sequence',13,'RS encode/Register-shift'].

set_param([sys,'/',['Integer sequence',13,'RS encode/Register-shift']],...
		'ForeGround',3,...
		'position',[225,40,280,80])


%     Subsystem  ['Integer sequence',13,'RS encode/Rising edge',13,'detector'].

new_system([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],'Location',[282,116,671,290])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/out_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/out_1']],...
		'position',[340,25,360,45])

add_block('built-in/Relational Operator',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Relational',13,'Operator1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Relational',13,'Operator1']],...
		'position',[200,88,230,112])

add_block('built-in/Relational Operator',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Relational',13,'Operator2']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Relational',13,'Operator2']],...
		'Operator','>',...
		'position',[265,23,295,47])

add_block('built-in/Constant',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/one1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/one1']],...
		'Value','thld',...
		'position',[30,135,60,155])

add_block('built-in/Memory',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Memory1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Memory1']],...
		'position',[125,80,165,110])

add_block('built-in/Inport',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/in_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/in_1']],...
		'position',[10,15,30,35])

add_block('built-in/Relational Operator',[sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Relational',13,'Operator']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector/Relational',13,'Operator']],...
		'position',[135,18,165,42])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[35,25;130,25])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[45,25;45,95;120,95])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[170,95;195,95])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[65,145;100,145;100,35;130,35])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[100,145;180,145;180,105;195,105])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[170,30;260,30])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[235,100;240,100;240,40;260,40])
add_line([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],[300,35;335,35])
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],...
		'Mask Display','Edge\nDetector',...
		'Mask Type','Edge Detection',...
		'Mask Dialogue','Rising edge detection:|Threshold:',...
		'Mask Translate','thld=@1;')
set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],...
		'Mask Help','When the input signal rising edge passed the given shreshold, this block outputs one, otherwise outputs zero.',...
		'Mask Entries','0.1\/')


%     Finished composite block ['Integer sequence',13,'RS encode/Rising edge',13,'detector'].

set_param([sys,'/',['Integer sequence',13,'RS encode/Rising edge',13,'detector']],...
		'ForeGround',2,...
		'position',[315,56,365,84])


%     Subsystem  ['Integer sequence',13,'RS encode/Triggered',13,'buffer down'].

new_system([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],'Location',[306,291,744,461])

add_block('built-in/Inport',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/in_3']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/in_3']],...
		'Port','3',...
		'position',[65,85,85,105])

add_block('built-in/Inport',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/in_2']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/in_2']],...
		'Port','2',...
		'position',[40,70,60,90])

add_block('built-in/Inport',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/in_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/in_1']],...
		'position',[15,55,35,75])

add_block('built-in/S-Function',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/S-function']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/S-function']],...
		'function name','regdown',...
		'parameters','ini_idx, idx_inc, thrshld, cycl_flag',...
		'position',[185,70,235,90])

add_block('built-in/Demux',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/Demux']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/Demux']],...
		'outputs','[out_size 1]',...
		'position',[290,62,330,98])

add_block('built-in/Mux',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/Mux']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/Mux']],...
		'inputs','[in_size 1 1]',...
		'position',[110,59,140,101])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/out_2']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/out_2']],...
		'Port','2',...
		'position',[355,80,375,100])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/out_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down/out_1']],...
		'position',[390,60,410,80])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[90,95;105,95])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[335,90;350,90])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[65,80;105,80])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[335,70;385,70])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[40,65;105,65])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[145,80;180,80])
add_line([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],[240,80;285,80])
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],...
		'Mask Display','Triggered\nbuffer dn',...
		'Mask Type','Triggered buffer down.')
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],...
		'Mask Dialogue','Triggered buffer down.|Input signal vector size:|Initial index (integer vector):|Increament for each index (integer vector):|Trigger threshold:|When index exceed register size, 1 for cyclic ouput, 0 for zero output:')
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],...
		'Mask Translate','in_size=@1; ini_idx=@2; idx_inc=@3; thrshld=@4; cycl_flag=@5; out_size=length(ini_idx);')
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],...
		'Mask Help','The register inside this block take the signal vector at the 1st inport by the raising edge of the second inport. The fisrt outport outputs a signal vector at the raising edge of the third inport.')
set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],...
		'Mask Entries','n\/0\/1\/.1\/0\/')


%     Finished composite block ['Integer sequence',13,'RS encode/Triggered',13,'buffer down'].

set_param([sys,'/',['Integer sequence',13,'RS encode/Triggered',13,'buffer down']],...
		'ForeGround',6,...
		'position',[540,53,600,87])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/out_2']])
set_param([sys,'/',['Integer sequence',13,'RS encode/out_2']],...
		'Port','2',...
		'position',[645,70,665,90])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/out_1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/out_1']],...
		'position',[685,55,705,75])

add_block('built-in/Demux',[sys,'/',['Integer sequence',13,'RS encode/Demux']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Demux']],...
		'outputs','2',...
		'position',[125,90,170,125])


%     Subsystem  ['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time'].

new_system([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time']],'Location',[55,192,283,286])

add_block('built-in/S-Function',[sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time/S-function1']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time/S-function1']],...
		'function name','homopuls',...
		'parameters','samp_time, out_divid, offset',...
		'position',[40,31,105,59])

add_block('built-in/Outport',[sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time/Outport']])
set_param([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time/Outport']],...
		'position',[160,35,180,55])
add_line([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time']],[110,45;155,45])
set_param([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time']],...
		'Mask Display','Vector\nPulse',...
		'Mask Type','Pulse generator')
set_param([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample time']],...
		'Mask Dialogue','Vector pulses with sample rate of each pulse as Sample_time ./Divider. |Sample time (scalar, sec):|Divider (integer vector):|Offset (have same dimension as Divider):')
set_param([sys,'/',['Integer sequence',13,'RS encode/Pulses deivide',13,'same sample ti