dsp281x_sysctrl.c

代码用于测试dsp2812的硬件功能

//###########################################################################
//
// FILE:   DSP281x_SysCtrl.c
// TITLE:  DSP281x Device System Control Initialization & Support Functions.
// WRITER:	ZHANG X.L.;
//
//###########################################################################

#include "DSP281x_Device.h"     // DSP281x Headerfile Include File
#include "DSP281x_Examples.h"   // DSP281x Examples Include File

//---------------------------------------------------------------------------
// InitSysCtrl: 
//
// This function initializes the System Control registers to a known state.
// - Disables the watchdog
// - Set the PLLCR for proper SYSCLKOUT frequency 
// - Set the pre-scaler for the high and low frequency peripheral clocks
// - Enable the clocks to the peripherals
//
//---------------------------------------------------------------------------
void InitSysCtrl(void)
{
	volatile int16 dummy;           // General purpose volatile int16

	EALLOW;                         // Enable EALLOW protected register access
	// Memory Protection Configuration
	DevEmuRegs.DEVICECNF.bit.ENPROT = 1 ;//Enable Read-Write protection;
	DevEmuRegs.PROTSTART = 0x0100;  // Write default value to protection start register
	DevEmuRegs.PROTRANGE = 0x00FF;  // Write default value to protection range register

	// Unlock the Code Security Module if CSM not in use
	/* Unlocking the CSM will allow code running from non-secure memory
   	to access code and data in secure memory.  One would only want to
	unsecure the CSM if code security were not desired, and therefore
   	the CSM is not in use (otherwise, unlocking the CSM will compromise
   	the security of user code).  If the CSM is not in use, the best
   	thing to do is leave the password locations programmed to 0xFFFF,
   	which is the flash ERASED state.  When all passwords are 0xFFFF,
   	all that is required to unlock the CSM are dummy reads of the
   	PWL locations.
	*/
	dummy = CsmPwl.PSWD0;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD1;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD2;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD3;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD4;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD5;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD6;           // Dummy read of PWL locations
	dummy = CsmPwl.PSWD7;           // Dummy read of PWL locations

	asm(" RPT #6 || NOP");

	// SYSCLKOUT = SYSCLKIN = 120 MHz;  
    SysCtrlRegs.PLLCR.bit.DIV = 8; // Setup the Clock PLL to multiply by 4;
	delay((Uint32)131072);
	//InitPll(0x8);

	SysCtrlRegs.LPMCR0.all = 0;   //
	SysCtrlRegs.LPMCR1.all = 0;  //

	SysCtrlRegs.HISPCP.all = 0x1;   // Highspeed Clock = SYSCLKOUT / 2 = 60MHz;
	SysCtrlRegs.LOSPCP.all = 0x2;   // Lowspeed CLock = SYSCLKOUT / 4 = 30MHz;

	// Peripheral clock enables set for the selected peripherals.
	SysCtrlRegs.PCLKCR.bit.EVAENCLK = 1; // HSPCLK;
	SysCtrlRegs.PCLKCR.bit.EVBENCLK = 1; // HSPCLK;
	SysCtrlRegs.PCLKCR.bit.SCIAENCLK =1; // LSPCLK;
	SysCtrlRegs.PCLKCR.bit.SCIBENCLK = 1; // LSPCLK;
	SysCtrlRegs.PCLKCR.bit.MCBSPENCLK = 1; // LSPCLK;
	SysCtrlRegs.PCLKCR.bit.SPIENCLK = 1; // LSPCLK;
	SysCtrlRegs.PCLKCR.bit.ECANENCLK = 1; // SYSCLKOUT;
	SysCtrlRegs.PCLKCR.bit.ADCENCLK = 1; // HSPCLK;

	// Setup the watchdog:disabled;
	SysCtrlRegs.SCSR = 0;	// Watchdog is in reset mode;Allowed to change the state of WDDIS bit;
	SysCtrlRegs.WDCR= 0x0068;  // 0x0068  to disable the Watchdog , Prescaler = 1
                               // 0x002F  to NOT disable the Watchdog, Prescaler = 64
	EDIS;
}

//---------------------------------------------------------------------------
// Function: initializes the PLLCR register.
//---------------------------------------------------------------------------
void InitPll(Uchar val)
{
   volatile Uint16 iVol;   
   
   if (SysCtrlRegs.PLLCR.bit.DIV != val)
   {
   
      EALLOW;
      SysCtrlRegs.PLLCR.bit.DIV = val;
      EDIS;
   
   // Optional: Wait for PLL to lock.
   // During this time the CPU will switch to OSCCLK/2 until the PLL is 
   // stable.  Once the PLL is stable the CPU will switch to the new PLL value. 
   //
   // This switch time is 131072 CLKIN cycles as of Rev C silicon.  
   //   
   // Code is not required to sit and wait for the PLL to lock.   
   // However, if the code does anything that is timing critical, 
   // and requires the correct clock be locked, then it is best to 
   // wait until this switching has completed.  
   
   // If this function is run from waitstated memory, then the loop count can
   // be reduced as long as the minimum switch time is still met. 

   // iVol is volatile so the compiler will not optimize this loop out
   //
   // The watchdog should be disabled before this loop, or fed within 
   // the loop.   
   
      DisableDog();
   
   // Wait lock cycles.  
   // Note,  This loop is tuned to 0-waitstate RAM memory.  If this
   // function is run from wait-stated memory such as Flash or XINTF,
   // then the number of times through the loop can be reduced 
   // accordingly. 
      for(iVol= 0; iVol< ( (131072/2)/12 ); iVol++)
      {
   
      }
   }
}

void InitGpio(void)
{
  	EALLOW;
  	GpioMuxRegs.GPAMUX.all = 0x0000;   // all GPIO port Pin's to I/O 
  	GpioMuxRegs.GPBMUX.all = 0x0000;
  	GpioMuxRegs.GPDMUX.all = 0x0000;
  	GpioMuxRegs.GPFMUX.all = 0x0000;
  	GpioMuxRegs.GPEMUX.all = 0x0000;
  	GpioMuxRegs.GPGMUX.all = 0x0000;

	GpioMuxRegs.GPADIR.all = 0x0000;   // GPIO PORT  as input
  	GpioMuxRegs.GPBDIR.all = 0x0000;
  	GpioMuxRegs.GPDDIR.all = 0x0000;   
  	GpioMuxRegs.GPEDIR.all = 0x0000;   
  	GpioMuxRegs.GPFDIR.all = 0x0000;   
  	GpioMuxRegs.GPGDIR.all = 0x0000;    

  	GpioMuxRegs.GPAQUAL.all = 0x0000;  // Set GPIO input qualifier values to zero
  	GpioMuxRegs.GPBQUAL.all = 0x0000;
  	GpioMuxRegs.GPDQUAL.all = 0x0000;
  	GpioMuxRegs.GPEQUAL.all = 0x0000;
  	EDIS;
}

/**********************************************************************
* Function: CfgFlash()
* Description: Initializes the F281x flash timing registers.
* Notes:
*  1) This function MUST be executed out of RAM.  Executing it out of
*     OTP/FLASH will produce unpredictable results.
*  2) The flash registers are code security module protected.  Therefore,
*     you must either run this function from L0/L1 RAM, or you must
*     first unlock the CSM.  Note that unlocking the CSM as part of
*     the program flow can compromise the code security.
*  3) The latest datasheet for the particular device of interest should
*     be consulted to confirm the flash timing specifications.
**********************************************************************/
#pragma CODE_SECTION(CfgFlash, "ramfuncs")
void CfgFlash(void)
{
  	EALLOW;                      // Enable EALLOW protected register access
  	FlashRegs.FPWR.bit.PWR = 3;          // Pump and bank set to active mode
  	FlashRegs.FSTATUS.bit.V3STAT = 1;    // Clear the 3VSTAT bit
  	FlashRegs.FSTDBYWAIT.bit.STDBYWAIT = 0x01FF;   // Sleep to standby transition cycles
  	FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF; // Standby to active transition cycles
	FlashRegs.FBANKWAIT.bit.RANDWAIT = 5;// Random access waitstates
 	FlashRegs.FBANKWAIT.bit.PAGEWAIT = 5;// Paged access waitstates
// 	FlashRegs.FBANKWAIT.bit.RANDWAIT = 2;// Random access waitstates
//	FlashRegs.FBANKWAIT.bit.PAGEWAIT = 2;// Paged access waitstates
  	FlashRegs.FOTPWAIT.bit.OTPWAIT = 8;  // OTP waitstates
  	FlashRegs.FOPT.bit.ENPIPE = 1;       // Enable the flash pipeline
  	EDIS;                        // Disable EALLOW protected register access
	// Force a complete pipeline flush to ensure that the write to the last register
	// configured occurs before returning.  Safest thing is to wait 8 full cycles.
  	asm(" RPT #8 || NOP");
}  //end of CfgFlash()

//---------------------------------------------------------------------------
// Function: resets the watchdog timer;
//---------------------------------------------------------------------------
void KickDog(void)
{
    EALLOW;
    SysCtrlRegs.WDKEY = 0x0055;
    SysCtrlRegs.WDKEY = 0x00AA;
    EDIS;
}

//---------------------------------------------------------------------------
// Function: disables the watchdog timer;
//---------------------------------------------------------------------------
void DisableDog(void)
{
    EALLOW;
    SysCtrlRegs.WDCR= 0x0068;
	EDIS;
}

//===========================================================================
// No more.
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