复件 (2) dsp281x_sci.c

代码用于测试dsp2812的硬件功能

//###########################################################################
//
// FILE:	DSP281x_Sci.c
// TITLE:	DSP281x SCI Initialization & Support Functions.
//	WRITER:	ZHANG X.L.
//
//###########################################################################

#include "DSP281x_Device.h"     // DSP281x Headerfile Include File
#include "DSP281x_Examples.h"   // DSP281x Examples Include File

volatile Uint8 DSP_STOP = 0x01;
volatile Uint8 DSP_RESTART = 0x01;

interrupt void SciaRxIntISR(void);
interrupt void SciaTxIntISR(void);
interrupt void ScibRxIntISR(void);
interrupt void ScibTxIntISR(void);

//---------------------------------------------------------------------------
// InitSCI: 
// This function initializes the SCI to a known state.
//---------------------------------------------------------------------------
void InitSci(void)
{
#if	SCIA_SCIB	
	// Initialize SCIA:
	EALLOW;
	GpioMuxRegs.GPFMUX.bit.SCIRXDA_GPIOF5 = 1;
  	GpioMuxRegs.GPFMUX.bit.SCITXDA_GPIOF4 = 1; 
	PieVectTable.RXAINT = &SciaRxIntISR;
	PieVectTable.TXAINT = &ScibTxIntISR;
	EDIS;
	#ifdef SciFIFO
	SciaRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback 
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   	SciaRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK, 
                                  // Disable RX ERR, SLEEP, TXWAKE
   	SciaRegs.SCICTL2.bit.TXINTENA = 1;
   	SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
  	 SciaRegs.SCIHBAUD = 0x0000;
   	SciaRegs.SCILBAUD = 194;
   	SciaRegs.SCICCR.bit.LOOPBKENA = 1; // Enable loop back  
   	SciaRegs.SCIFFTX.all = 0xC028;
   	SciaRegs.SCIFFRX.all = 0x0028;
   	SciaRegs.SCIFFCT.all = 0x00;

   	SciaRegs.SCICTL1.all = 0x0023;     // Relinquish SCI from Reset 
   	SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
   	SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;	 	
	#else
	SciaRegs.SCICCR.all = 0x0007;    // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
  	SciaRegs.SCICTL1.all = 0x0023;   //re-enable the SCI, enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
  	SciaRegs.SCIHBAUD = 0;          // BRR = LSPCLK / (SCI baud rate * 8) - 1 ;
  	SciaRegs.SCILBAUD = 194;		// 19200 Baud , LSPCLK = 30MHz ;

  	SciaRegs.SCICTL2.bit.TXINTENA = 0;   // Disable SCI-Transmit-interrupt
  	SciaRegs.SCICTL2.bit.RXBKINTENA = 1; // Enable SCI-A-Receive-interrupt
  	SciaRegs.SCIFFTX.bit.SCIFFENA = 0;    //Disable SCI FIFO enhancements

  	SciaRegs.SCIPRI.all = 0x0000;   //Immediate stop on emulation suspend   
  	SciaRegs.SCICTL1.all = 0x0023;  // Relinquish SCI from Reset
	#endif
#else  
 	// Initialize SCIB:
	// Have the same configuration with SCI-A;
	// Attention:Don't forget to change the configuration of
	//  SCIBCLKEN in the function of InitSystem(),in "DSP281x_SysCtrl.c";
	EALLOW;
	GpioMuxRegs.GPGMUX.bit.SCIRXDB_GPIOG5 = 1;
	GpioMuxRegs.GPGMUX.bit.SCITXDB_GPIOG4 = 1;
	PieVectTable.RXBINT = &ScibRxIntISR;
	PieVectTable.TXBINT = &ScibTxIntISR;
	EDIS;
 	#ifdef SciFIFO
	ScibRegs.SCICCR.all = 0x0007;    // 1 stop bit,  No loopback 
                                   // No parity,8 char bits,
                                   // async mode, idle-line protocol
   	ScibRegs.SCICTL1.all = 0x0003;   // enable TX, RX, internal SCICLK, 
                                   // Disable RX ERR, SLEEP, TXWAKE
   	ScibRegs.SCICTL2.bit.TXINTENA = 1;
   	ScibRegs.SCICTL2.bit.RXBKINTENA = 1;
   	ScibRegs.SCIHBAUD = 0x0000;		// Baund rate = 19200 bit/s;
   	ScibRegs.SCILBAUD = 194;
//  	ScibRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back  
   	ScibRegs.SCIFFTX.all=0xC021;	// Enable transmit FIFO interrupt,
									// TXFFIL = 8 ;
   	ScibRegs.SCIFFRX.all=0x0021;	// Enable receive FIFO interrupt,
   									// RXFFIL = 8 ;
   	ScibRegs.SCIFFCT.all=0x00;	// Disable auto-baund,FIFO transmit delay 
   									// is 0 baund clock cycles;

   	ScibRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset 
   	ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   	ScibRegs.SCIFFRX.bit.RXFIFORESET=1;	 
	#else
	ScibRegs.SCICCR.all = 0x0007;    
  	ScibRegs.SCICTL1.all = 0x0023;   

  	ScibRegs.SCIHBAUD = 0;          
  	ScibRegs.SCILBAUD = 194;

  	ScibRegs.SCICTL2.bit.TXINTENA = 0;  
  	ScibRegs.SCICTL2.bit.RXBKINTENA = 1;
  	ScibRegs.SCIFFTX.bit.SCIFFENA = 0;    

  	ScibRegs.SCIPRI.all = 0x0000;      
  	ScibRegs.SCICTL1.all = 0x0023;  
	#endif
#endif
}

void SCITXD(Uchar TXdata)
{
#if	SCIA_SCIB
	//transmit one byte data from SCIA;
  	SciaRegs.SCITXBUF = TXdata;
  	while(!SciaRegs.SCICTL2.bit.TXEMPTY);
#else
	//transmit one byte data from SCIB;
	ScibRegs.SCITXBUF = TXdata;
	while(!ScibRegs.SCICTL2.bit.TXEMPTY);
#endif
}	

void SCITXD_f(float32 TXData_f)
{
	Uint16 buff[2];
	Uint8 i,Sciftemp[4];
	buff[0] = ((Uchar *)&TXData_f)[0];
	buff[1] = ((Uchar *)&TXData_f)[1];
	Sciftemp[0] = (Uint8)(buff[0] & 0x00FF);
	Sciftemp[1] = (Uint8)(buff[0] >> 0x08);
	Sciftemp[2] = (Uint8)(buff[1] & 0x00FF);
	Sciftemp[3] = (Uint8)(buff[1] >> 0x08);
	for ( i = 0x00; i < 0x04 ; i++)
	{
		SCITXD(Sciftemp[0x03-i]);
		delay(0x0000012C);		// delay(300) , NEEDED;
	}

}

void SCITXD_i(Uint32 TXData_i)
{
	Uint16 buff[2];
	Uint8 i,Sciftemp[4];
	buff[0] = ((Uchar *)&TXData_i)[0];
	buff[1] = ((Uchar *)&TXData_i)[1];
	Sciftemp[0] = (Uint8)(buff[0] & 0x00FF);
	Sciftemp[1] = (Uint8)(buff[0] >> 0x08);
	Sciftemp[2] = (Uint8)(buff[1] & 0x00FF);
	Sciftemp[3] = (Uint8)(buff[1] >> 0x08);
	for ( i = 0x00; i < 0x04 ; i++)
	{
		SCITXD(Sciftemp[0x03-i]);
		delay(0x0000012c);		// delay(300) , NEEDED;
	}

}
//---------------------------------------------------------
// function: interrupt service routine
// Scia & Scib;
//----------------------------------------------------------
interrupt void SciaRxIntISR(void)     // SCIARXD ; INT 9.1 ;
{ 
//#ifdef	SciFIFO

//#else
	Uchar iData; 
	iData=SciaRegs.SCIRXBUF.bit.RXDT;
	SciaRegs.SCICTL1.bit.SWRESET=1;//re-enable the SCI;
//	SCITXD(iData);
	#if	TEST_RUN
	if(iData == STOP)
		DSP_STOP = 0x00;
	else if (iData == RESTART)
		DSP_RESTART = 0x00;
	#endif
//#endif
	// To receive more interrupts from this PIE group, acknowledge this interrupt 
  	PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
}


interrupt void SciaTxIntISR(void)     // SCI-A-TXD;INT9.2
{
	// Insert ISR Code here

	// To receive more interrupts from this PIE group, acknowledge this interrupt 
	// PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
	
	// Next two lines for debug only to halt the processor here
	// Remove after inserting ISR Code 
	ESTOP0;
	for(;;);
}

interrupt void ScibRxIntISR(void)     // SCIBRXD ; INT9.3 ;
{ 
	Uchar iData; 
	iData = ScibRegs.SCIRXBUF.bit.RXDT;
	iData = iData;
	ScibRegs.SCICTL1.bit.SWRESET = 1;//re-enable the SCI;
//	SCITXD(iData);	// $;
#if	TEST_RUN
	if(iData == STOP)
		DSP_STOP = 0x00;
	else if (iData == RESTART)
		DSP_RESTART = 0x00;
#endif
	ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;  // Clear Overflow flag
	ScibRegs.SCIFFRX.bit.RXFFINTCLR=1; 	// Clear Interrupt flag
	// To receive more interrupts from this PIE group, acknowledge this interrupt 
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
}

interrupt void ScibTxIntISR(void)     // SCI-B-TXD;INT9.4;
{
  // Insert ISR Code here

  // To receive more interrupts from this PIE group, acknowledge this interrupt 
  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;

  // Next two lines for debug only to halt the processor here
  // Remove after inserting ISR Code
	ESTOP0;
	for(;;);

}
//===========================================================================
// No more.
//===========================================================================