at91_serial.c

嵌入式 linux 扩展串口 驱动 测试程序

/*
 *  linux/drivers/char/at91_serial.c
 *
 *  Driver for Atmel AT91RM9200 Serial ports
 *
 *  Copyright (c) Rick Bronson
 *
 *  Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */
#include <linux/config.h>
#include <linux/module.h>
#include <linux/tty.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/console.h>
#include <linux/sysrq.h>

#include <asm/arch/AT91RM9200_USART.h>
#include <asm/mach/serial_at91rm9200.h>
#include <asm/arch/pio.h>

//added by [e-mail]
#define SUPPORT_TL16C554    1
// config the rs485 mode 
#define UART_RS485_CONFIG  0x5AA1
#define UART_RS485_READ    0x5AA2
#define UART_RS485_WRITE   0x5AA3

#if defined(CONFIG_SERIAL_AT91_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif

#include <linux/serial_core.h>

#define SERIAL_AT91_MAJOR	TTY_MAJOR
#define CALLOUT_AT91_MAJOR	TTYAUX_MAJOR
#define MINOR_START		64

#define AT91C_VA_BASE_DBGU	((unsigned long) &(AT91_SYS->DBGU_CR))
#define AT91_ISR_PASS_LIMIT	256

#define UART_PUT_CR(port,v)	((AT91PS_USART)(port)->membase)->US_CR = v
#define UART_GET_MR(port)	((AT91PS_USART)(port)->membase)->US_MR
#define UART_PUT_MR(port,v)	((AT91PS_USART)(port)->membase)->US_MR = v
#define UART_PUT_IER(port,v)	((AT91PS_USART)(port)->membase)->US_IER = v
#define UART_PUT_IDR(port,v)	((AT91PS_USART)(port)->membase)->US_IDR = v
#define UART_GET_IMR(port)	((AT91PS_USART)(port)->membase)->US_IMR
#define UART_GET_CSR(port)	((AT91PS_USART)(port)->membase)->US_CSR
#define UART_GET_CHAR(port)	((AT91PS_USART)(port)->membase)->US_RHR
#define UART_PUT_CHAR(port,v)	((AT91PS_USART)(port)->membase)->US_THR = v
#define UART_GET_BRGR(port)	((AT91PS_USART)(port)->membase)->US_BRGR
#define UART_PUT_BRGR(port,v)	((AT91PS_USART)(port)->membase)->US_BRGR = v
#define UART_PUT_RTOR(port,v)	((AT91PS_USART)(port)->membase)->US_RTOR = v

// #define UART_GET_CR(port)  ((AT91PS_USART)(port)->membase)->US_CR    // is write-only

 /* PDC registers */
#define UART_PUT_PTCR(port,v)	((AT91PS_USART)(port)->membase)->US_PTCR = v
#define UART_PUT_RPR(port,v)	((AT91PS_USART)(port)->membase)->US_RPR = v
#define UART_PUT_RCR(port,v)	((AT91PS_USART)(port)->membase)->US_RCR = v
#define UART_GET_RCR(port)	((AT91PS_USART)(port)->membase)->US_RCR
#define UART_PUT_RNPR(port,v)	((AT91PS_USART)(port)->membase)->US_RNPR = v
#define UART_PUT_RNCR(port,v)	((AT91PS_USART)(port)->membase)->US_RNCR = v

static struct tty_driver normal, callout;

//added by [e-mail]
#ifdef SUPPORT_TL16C554
static struct tty_struct *at91_table[AT91C_NR_UART+4];
static struct termios *at91_termios[AT91C_NR_UART+4], *at91_termios_locked[AT91C_NR_UART+4];
#else
static struct tty_struct *at91_table[AT91C_NR_UART];
static struct termios *at91_termios[AT91C_NR_UART], *at91_termios_locked[AT91C_NR_UART];
#endif

const int at91_serialmap[AT91C_NR_UART] = AT91C_UART_MAP;

static int (*at91_open)(struct uart_port *);
static void (*at91_close)(struct uart_port *);

#ifdef SUPPORT_SYSRQ
static struct console at91_console;
#endif

/*
 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
 */
static u_int at91_tx_empty(struct uart_port *port)
{
  return UART_GET_CSR(port) & AT91C_US_TXEMPTY ? TIOCSER_TEMT : 0;
}

/*
 * Set state of the modem control output lines
 */
static void at91_set_mctrl(struct uart_port *port, u_int mctrl)
{
  unsigned int control = 0;

	/*
	 * Errata #39: RTS0 is not internally connected to PA21.  We need to drive
	 *  the pin manually.
	 */
	if (port->mapbase == AT91C_VA_BASE_US0) {
		if (mctrl & TIOCM_RTS)
			AT91_SYS->PIOA_CODR = AT91C_PA21_RTS0;
		else
			AT91_SYS->PIOA_SODR = AT91C_PA21_RTS0;
	}

	if (mctrl & TIOCM_RTS)
		control |= AT91C_US_RTSEN;
	else
		control |= AT91C_US_RTSDIS;

	if (mctrl & TIOCM_DTR)
		control |= AT91C_US_DTREN;
	else
		control |=  AT91C_US_DTRDIS;

       UART_PUT_CR(port,control);
}

/*
 * Get state of the modem control input lines
 */
static u_int at91_get_mctrl(struct uart_port *port)
{
  unsigned int status, ret = 0;

  status = UART_GET_CSR(port);
  if (status & AT91C_US_DCD)
    ret |= TIOCM_CD;
  if (status & AT91C_US_CTS)
    ret |= TIOCM_CTS;
  if (status & AT91C_US_DSR)
    ret |= TIOCM_DSR;
  if (status & AT91C_US_RI)
    ret |= TIOCM_RI;

  return ret;
}

/*
 * Stop transmitting.
 */
static void at91_stop_tx(struct uart_port *port, u_int from_tty)
{
  UART_PUT_IDR(port, AT91C_US_TXRDY);
  port->read_status_mask &= ~AT91C_US_TXRDY;
}

/*
 * Start transmitting.
 */
static void at91_start_tx(struct uart_port *port, u_int from_tty)
{
	unsigned long flags;

	local_irq_save(flags);
	port->read_status_mask |= AT91C_US_TXRDY;
	UART_PUT_IER(port, AT91C_US_TXRDY);
	local_irq_restore(flags);
}

/*
 * Stop receiving - port is in process of being closed.
 */
static void at91_stop_rx(struct uart_port *port)
{
  UART_PUT_IDR(port, AT91C_US_RXRDY);
}

/*
 * Enable modem status interrupts
 */
static void at91_enable_ms(struct uart_port *port)
{
  UART_PUT_IER(port, AT91C_US_RIIC | AT91C_US_DSRIC | AT91C_US_DCDIC | AT91C_US_CTSIC);
}

/*
 * Control the transmission of a break signal
 */
static void at91_break_ctl(struct uart_port *port, int break_state)
{
  if (break_state != 0)
    UART_PUT_CR(port, AT91C_US_STTBRK); /* start break */
  else
    UART_PUT_CR(port, AT91C_US_STPBRK); /* stop break */
}

/*
 * Characters received (called from interrupt handler)
 */
static void at91_rx_chars(struct uart_port *port, struct pt_regs *regs)
{
	struct tty_struct *tty = port->info->tty;
	unsigned int status, ch, flg, ignored = 0;

	status = UART_GET_CSR(port);
	while (status & (AT91C_US_RXRDY)) {
		ch = UART_GET_CHAR(port);

		if (tty->flip.count >= TTY_FLIPBUF_SIZE)
			goto ignore_char;
		port->icount.rx++;

		flg = TTY_NORMAL;

		/*
		 * note that the error handling code is
		 * out of the main execution path
		 */
		if (status & (AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE))
			goto handle_error;

		if (uart_handle_sysrq_char(port, ch, regs))
			goto ignore_char;

	error_return:
		*tty->flip.flag_buf_ptr++ = flg;
		*tty->flip.char_buf_ptr++ = ch;
		tty->flip.count++;
	ignore_char:
		status = UART_GET_CSR(port);
	}
out:
  tty_flip_buffer_push(tty);
  return;

handle_error:
  if (status & (AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE))
    UART_PUT_CR(port, AT91C_US_RSTSTA);  /* clear error */
  if (status & (AT91C_US_PARE))
    port->icount.parity++;
  else if (status & (AT91C_US_FRAME))
    port->icount.frame++;
  if (status & (AT91C_US_OVRE))
    port->icount.overrun++;

  if (status & port->ignore_status_mask) {
    if (++ignored > 100)
      goto out;
    goto ignore_char;
  }

  status &= port->read_status_mask;

  UART_PUT_CR(port, AT91C_US_RSTSTA);  /* clear error */
  if (status & AT91C_US_PARE)
    flg = TTY_PARITY;
  else if (status & AT91C_US_FRAME)
    flg = TTY_FRAME;

  if (status & AT91C_US_OVRE) {
    /*
     * overrun does *not* affect the character
     * we read from the FIFO
     */
    *tty->flip.flag_buf_ptr++ = flg;
    *tty->flip.char_buf_ptr++ = ch;
    tty->flip.count++;
    if (tty->flip.count >= TTY_FLIPBUF_SIZE)
      goto ignore_char;
    ch = 0;
    flg = TTY_OVERRUN;
  }
#ifdef SUPPORT_SYSRQ
	port->sysrq = 0;
#endif
  goto error_return;
}

/*
 * Transmit characters (called from interrupt handler)
 */
static void at91_tx_chars(struct uart_port *port)
{
	struct circ_buf *xmit = &port->info->xmit;

	if (port->x_char) {
		UART_PUT_CHAR(port, port->x_char);
		port->icount.tx++;
		port->x_char = 0;
		return;
	}
	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
		at91_stop_tx(port, 0);
		return;
	}

	while (UART_GET_CSR(port) & AT91C_US_TXRDY) {
		UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
		port->icount.tx++;
		if (uart_circ_empty(xmit))
			break;
	}

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (uart_circ_empty(xmit))
		at91_stop_tx(port, 0);
}

/*
 * Interrupt handler
 */
static void at91_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
	struct uart_port *port = dev_id;
	unsigned int status, pending, pass_counter = 0;

	status = UART_GET_CSR(port);
	pending = status & port->read_status_mask;
	if (pending) {
		do {
			if (pending & AT91C_US_RXRDY)
				at91_rx_chars(port, regs);

			/* Clear the relevent break bits */
			if (pending & AT91C_US_RXBRK) {
				UART_PUT_CR(port, AT91C_US_RSTSTA);
				port->icount.brk++;
#ifdef SUPPORT_SYSRQ
				if (port->line == at91_console.index && !port->sysrq) {
					port->sysrq = jiffies + HZ*5;
				}
#endif
      }

			// TODO: All reads to CSR will clear these interrupts!
			if (pending & AT91C_US_RIIC) port->icount.rng++;
			if (pending & AT91C_US_DSRIC) port->icount.dsr++;
			if (pending & AT91C_US_DCDIC) {
				port->icount.dcd++;
				uart_handle_dcd_change(port, status & AT91C_US_DCD);
			}
			if (pending & AT91C_US_CTSIC) {
				port->icount.cts++;
				uart_handle_cts_change(port, status & AT91C_US_CTS);
			}
			if (pending & (AT91C_US_RIIC | AT91C_US_DSRIC | AT91C_US_DCDIC | AT91C_US_CTSIC))
				wake_up_interruptible(&port->info->delta_msr_wait);

			if (pending & AT91C_US_TXRDY)
				at91_tx_chars(port);
			if (pass_counter++ > AT91_ISR_PASS_LIMIT)
				break;

			status = UART_GET_CSR(port);
			pending = status & port->read_status_mask;
		} while (pending);
	}
}

/*
 * Perform initialization and enable port for reception
 */
static int at91_startup(struct uart_port *port)
{
  int retval;

	/*
	 * Allocate the IRQ
	 */
	retval = request_irq(port->irq, at91_interrupt, SA_SHIRQ, "at91_serial", port);
	if (retval) {
		printk("at91_serial: at91_startup - Can't get irq\n");
		return retval;
	}
	/*
	 * If there is a specific "open" function (to register
	 * control line interrupts)
	 */
	if (at91_open) {
		retval = at91_open(port);
		if (retval) {
			free_irq(port->irq, port);
			return retval;
		}
	}

	/* Enable peripheral clock if required */
	if (port->irq != AT91C_ID_SYS)
		AT91_SYS->PMC_PCER = 1 << port->irq;

	port->read_status_mask = AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_OVRE
			| AT91C_US_FRAME | AT91C_US_PARE | AT91C_US_RXBRK;
	/*
	 * Finally, clear and enable interrupts
	 */
	UART_PUT_IDR(port, -1);
	UART_PUT_CR(port, AT91C_US_TXEN | AT91C_US_RXEN);  /* enable xmit & rcvr */
	UART_PUT_IER(port, AT91C_US_RXRDY);  /* do receive only */
	return 0;
}

/*
 * Disable the port
 */
static void at91_shutdown(struct uart_port *port)
{
	/*
	 * Free the interrupt
	 */
	free_irq(port->irq, port);

	/*
	 * If there is a specific "close" function (to unregister
	 * control line interrupts)
	 */
	if (at91_close)
		at91_close(port);

	/*
	 * Disable all interrupts, port and break condition.
	 */
	UART_PUT_CR(port, AT91C_US_RSTSTA);
	UART_PUT_IDR(port, -1);

	/* Disable peripheral clock if required */
	if (port->irq != AT91C_ID_SYS)
		AT91_SYS->PMC_PCDR = 1 << port->irq;
}

static struct uart_ops at91_pops;		/* forward declaration */

/*
 * Change the port parameters
 */
static void at91_change_speed(struct uart_port *port, u_int cflag, u_int iflag, u_int quot)
{
  unsigned long flags;
  unsigned int mode, imr;

  /* Get current mode register */
  mode = UART_GET_MR(port) & ~(AT91C_US_CHRL | AT91C_US_NBSTOP | AT91C_US_PAR);

	/* byte size */
	switch (cflag & CSIZE) {
	case CS5:
		mode |= AT91C_US_CHRL_5_BITS;
		break;
	case CS6:
		mode |= AT91C_US_CHRL_6_BITS;
		break;
	case CS7:
		mode |= AT91C_US_CHRL_7_BITS;
		break;
	default:
		mode |= AT91C_US_CHRL_8_BITS;
		break;
	}

	/* stop bits */
	if (cflag & CSTOPB)
		mode |= AT91C_US_NBSTOP_2_BIT;