📄 pxa270.dat
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Disabled 0 Other More /* TDO ---------> */
/*
****************************************************************************
Additional flash component UNLOCK controls: 4 addition pins can be defined
that would be controlled to UNLOCK a flash memory device that has external
locking pins. Any unused pins should be set to 9999. Specify the signal level
required to UNLOCK the flash. These signals will be reversed to re-lock the
flash after programming.
****************************************************************************
*/
9999 1 /* gpio22_ctrl */
9999 1 /* gpio12_ctrl */
9999 1 /* gpio22_out */
9999 1 /* gpio12_out */
/*
****************************************************************************
ALIGNMENT CHECKPOINT # 3 - DO NOT MODIFY THIS DATA
****************************************************************************
*/
3333
/*
****************************************************************************
number of flash devices in parallel on the bus
****************************************************************************
*/
2
/*
****************************************************************************
position of nsdcas signal - toggled in parallel with any chip select
****************************************************************************
*/
58 /* nsdcas */
/*
****************************************************************************
Flash programming Mode: WORD or BUFFER
WORD programming is useful for doing things like smoothly crossing device
boundaries but is a little slower.
****************************************************************************
*/
BUFFER /* WORD or BUFFER is the allowed entry */
/*
****************************************************************************
E N D O F D A T A
****************************************************************************
*/
/*
BSDL File Used
--------------------------------------------------------------------------
-- File Type : BSDL Description Bulverde B0 v1_0 13x13 VFBGA
-- Author : jboyer
--------------------------------------------------------------------------
entity bulverde_b0_13x13 is
generic(PHYSICAL_PIN_MAP : string := "VFBGA");
port(
boot_sel_0 : in bit;
rdnwr : out bit;
clk_req : inout bit;
gpio : inout bit_vector(118 downto 0);
dqm_0 : out bit;
dqm_1 : out bit;
dqm_2 : out bit;
dqm_3 : out bit;
ma : out bit_vector(25 downto 0);
md : inout bit_vector(31 downto 0);
ncs_0 : out bit;
noe : out bit;
nsdcas : out bit;
nsdcs_0 : out bit;
nsdcs_1 : out bit;
nsdras : out bit;
nwe : out bit;
sdcke_1 : out bit;
sdclk_0 : out bit;
sdclk_1 : out bit;
sdclk_2 : out bit;
nbatt_fault : in bit;
nreset : in bit;
nreset_out : linkage bit;
nvdd_fault : in bit;
pwr_en : linkage bit;
pxtal_in : linkage bit;
pxtal_out : linkage bit;
test : in bit;
testclk : in bit;
txtal_in : linkage bit;
txtal_out : linkage bit;
uio : inout bit;
usbc_n : inout bit;
usbc_p : inout bit;
usbh_n_0 : inout bit;
usbh_p_0 : inout bit;
vcc_batt : linkage bit;
vcc_bb : linkage bit;
vcc_core : linkage bit_vector(13 downto 0);
vcc_io : linkage bit_vector(2 downto 0);
vcc_usb : linkage bit_vector(3 downto 0);
vcc_lcd : linkage bit_vector(1 downto 0);
vcc_mem : linkage bit_vector(18 downto 0);
pwr_out : linkage bit;
vcc_pll : linkage bit;
vcc_ram : linkage bit_vector(3 downto 0);
vcc_usim : linkage bit;
vss_bb : linkage bit;
vss_core : linkage bit_vector(19 downto 0);
vss_io : linkage bit_vector(7 downto 0);
vss_mem : linkage bit_vector(16 downto 0);
vss_pad : linkage bit_vector(5 downto 0);
vss_pll : linkage bit;
tdi : in bit;
tms : in bit;
tck : in bit;
tdo : out bit;
ntrst : in bit
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of bulverde_b0_13x13 : entity is "STD_1149_1_1993";
attribute PIN_MAP of bulverde_b0_13x13 : entity is PHYSICAL_PIN_MAP;
constant VFBGA : PIN_MAP_STRING :=
"boot_sel_0: ab23," &
"rdnwr: c9," &
"clk_req: w24," &
"gpio: (a22,d20,c24,e21,d24,a13,b18,c17,b17," &
"d17,ad14,ac15,ab15,ab16,ad15,ac16,ab17,ac17,ac18," &
"ab18,ad18,aa17,ac19,aa18,ad19,ab19,a19,f23,f22," &
"d22,c23,n23,n22,ac12,aa11,ad10,ad9,ab12,c7," &
"c8,b7,r21,p22,p23,r23,m22,n24,l22,m24," &
"l23,l21,k23,k22,k24,j22,h23,h22,h24,g23," &
"g22,g24,ac11,ab11,aa10,aa14,ab14,ac14,ad13,ab13," &
"a10,ac13,a11,b11,c19,b20,c22,c21,c18,d14," &
"d19,b14,a15,c14,b19,a21,b6,a20,c12,c13," &
"b13,a14,c15,b15,d16,a17,b16,d13,ad5,ab6," &
"r22,b9,c16,a18,a3,t24,c10,b10,c11,v23," &
"u22,aa20,ac22,ad22,ab21,w23,w21,aa24,y24,v22)," &
"dqm_0: ab9," &
"dqm_1: ab10," &
"dqm_2: ac9," &
"dqm_3: ac10," &
"ma: (d6,c4,d4,c2,d2,e4,e3,c1,d1,f3," &
"g4,f2,e1,g3,g2,h3,h2,g1,j3,j2,k3,k2,j1,k4,a6,c6)," &
"md: (l2,m2,m3,n2,n1,p3,r3,r1,t1,v2,v1,w1,y1,aa1,ab3,aa4," &
"k1,l1,m4,n3,p2,p4,r4,t3,u1,v3,u4,y2,y3,aa3,ab1,ab4)," &
"ncs_0: b3," &
"noe: ac5," &
"nsdcas: aa6," &
"nsdcs_0: ab7," &
"nsdcs_1: ab8," &
"nsdras: ac7," &
"nwe: ab5," &
"sdcke_1: ad6," &
"sdclk_0: ac4," &
"sdclk_1: ad7," &
"sdclk_2: ad3," &
"nbatt_fault: ab24," &
"nreset: y22," &
"nreset_out: y21," &
"nvdd_fault: w22," &
"pwr_en: y23," &
"pxtal_in: ac21," &
"pxtal_out: ad21," &
"test: u24," &
"testclk: t23," &
"txtal_in: aa22," &
"txtal_out: aa23," &
"uio: e23," &
"usbc_n: c20," &
"usbc_p: b22," &
"usbh_n_0: d23," &
"usbh_p_0: e22," &
"vcc_batt: ab20," &
"vcc_bb: ad12," &
"vcc_core: (ad11,t2,ad4,w3,b21,m23,r24,ad16,f24,l24,j23,d3," &
"a7,b12)," &
"vcc_io: (ad17,a12,a16)," &
"vcc_usb: (a23,a24,b23,b24)," &
"vcc_lcd: (j24,p24)," &
"vcc_mem: (w2,ac6,a4,b8,ac8,aa2,u2,ad8,f1,h1,m1,ad1,ac1," &
"ac2,ad2,l3,e2,c3,p1)," &
"pwr_out: ab22," &
"vcc_pll: ac20," &
"vcc_ram: (b4,a5,a8,a9)," &
"vcc_usim: e24," &
"vss_bb: aa13," &
"vss_core: (aa12,w4,d8,d12,d21,g21,k21,p21,aa7,u3,m21,aa15," &
"d10,j21,a1,b1,a2,b2,d7,b5)," &
"vss_io: (d11,d15,d18,f21,h21,n21,aa19,aa16)," &
"vss_mem: (y4,c5,r2,n4,d9,aa9,aa8,aa5,v4,t4,l4,ab2,ac3,j4," &
"h4,f4,d5)," &
"vss_pad: (v21,ad23,ac23,ad24,ac24,aa21)," &
"vss_pll: ad20," &
"tdi: u23," &
"tms: t21," &
"tck: t22," &
"tdo: v24," &
"ntrst: u21";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.0e6, BOTH);
attribute TAP_SCAN_RESET of NTRST : signal is true;
attribute INSTRUCTION_LENGTH of bulverde_b0_13x13 : entity is 7;
attribute INSTRUCTION_OPCODE of bulverde_b0_13x13 : entity is
"extest (0000000)," &
"bypass (1111111)," &
"sample (0000001)," &
"clamp (0000100)," &
"highz (0001000)," &
"flashload (0110110)," &
"flashprgm (0110111)," &
"idcode (1111110)";
attribute INSTRUCTION_CAPTURE of bulverde_b0_13x13 : entity is "0000001";
attribute IDCODE_REGISTER of bulverde_b0_13x13 : entity is
"0010" & -- Version Number
"1001001001100101" & -- Part Number
"00000001001" & -- Manufacturer ID
"1"; -- Required by IEEE Std. 1149.1-1990
attribute REGISTER_ACCESS of bulverde_b0_13x13 : entity is
"BOUNDARY (extest, sample)," &
"DEVICE_ID (idcode)," &
"BYPASS (bypass, clamp, highz)," &
"flash_reg[76] (flashload, flashprgm)";
attribute BOUNDARY_LENGTH of bulverde_b0_13x13 : entity is 504;
attribute BOUNDARY_REGISTER of bulverde_b0_13x13 : entity is
-- num cell port function safe [ccell disval rslt]
"0 ( bc_1, ma(25), output3, X, 69, 0, Z)," &
"1 ( bc_1, ma(24), output3, X, 69, 0, Z)," &
"2 ( bc_1, ma(23), output3, X, 69, 0, Z)," &
"3 ( bc_1, ma(22), output3, X, 69, 0, Z)," &
"4 ( bc_1, ma(21), output3, X, 69, 0, Z)," &
"5 ( bc_1, ma(20), output3, X, 69, 0, Z)," &
"6 ( bc_1, ma(19), output3, X, 69, 0, Z)," &
"7 ( bc_1, ma(18), output3, X, 69, 0, Z)," &
"8 ( bc_1, ma(17), output3, X, 69, 0, Z)," &
"9 ( bc_1, ma(16), output3, X, 69, 0, Z)," &
"10 ( bc_1, ma(15), output3, X, 69, 0, Z)," &
"11 ( bc_1, ma(14), output3, X, 69, 0, Z)," &
"12 ( bc_1, ma(13), output3, X, 69, 0, Z)," &
"13 ( bc_1, ma(12), output3, X, 69, 0, Z)," &
"14 ( bc_1, ma(11), output3, X, 69, 0, Z)," &
"15 ( bc_1, ma(10), output3, X, 69, 0, Z)," &
"16 ( bc_1, ma(9), output3, X, 69, 0, Z)," &
"17 ( bc_1, ma(8), output3, X, 69, 0, Z)," &
"18 ( bc_1, ma(7), output3, X, 69, 0, Z)," &
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