oc_i2c_master.h

nios ii sopc关于ISP1362和DM9000A的工程

#ifndef __CAT1025_H__
#define __CAT1025_H__

#include <stddef.h>
#include <sys/termios.h>
#include "alt_types.h"
#include "gx_oc_i2c_regs.h"

#include "sys/alt_dev.h"
#include "sys/alt_warning.h"
#include "os/alt_sem.h"

#ifdef __GLOBAL_DEF__
#define __EXT__   
#else
#define __EXT__ extern
#endif

#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */

/************************************************************************************
**          I2C-Master Core accessor Marco for read or write a byte data            *
*************************************************************************************/ 
/* Wait until the completion of process        */
#define I2C_WAIT_TIP(base)    while ((IORD_OC_I2C_SR(base) & OC_I2C_SR_TIP_MSK) > 0)

/* Send a byte data without start signal    */
#define I2C_SEND_BYTE(base, data)    do{ \
                                         IOWR_OC_I2C_TXR(base, data);\
                                         IOWR_OC_I2C_CR(base, OC_I2C_CR_WR_MSK);\
                                         I2C_WAIT_TIP(base);\
	                                     }while(0)
/* Send a byte data with start signal       */	                                     
#define I2C_SEND_BYTE_WITH_START(base, data)  \
                                     do{ \
                                         IOWR_OC_I2C_TXR(base, data);\
                                         IOWR_OC_I2C_CR(base, OC_I2C_CR_WR_MSK| \
	                                                        OC_I2C_CR_STA_MSK); \
	                                       I2C_WAIT_TIP(base);\
                                       }while(0)
/* Send a byte data with stop signal       */	                                     
#define I2C_SEND_BYTE_WITH_STOP(base, data) \
                                     do{ \
                                         IOWR_OC_I2C_TXR(base, data);\
                                         IOWR_OC_I2C_CR(base, OC_I2C_CR_WR_MSK| \
                                                          OC_I2C_CR_STO_MSK);\
	                                       I2C_WAIT_TIP(base); \
	                                     }while(0)
	                                     
/* Receive a byte data with ack signal           */		                                     
#define I2C_RECV_BYTE_WITH_ACK(base)	 I2CRecvByte(base,OC_I2C_CR_RD_MSK)

/* Receive a byte data with stop signal          */
#define I2C_RECV_BYTE_WITH_STOP(base)	 I2CRecvByte(base,OC_I2C_CR_RD_MSK|\
                                            OC_I2C_CR_ACK_MSK|OC_I2C_CR_STO_MSK)
	                                                              
/* Receive a byte data according to the command  */	                                                                 
static ALT_INLINE alt_u8 ALT_ALWAYS_INLINE I2CRecvByte(alt_u32 base, alt_u8 cmd)
{
    IOWR_OC_I2C_CR(base, cmd);
	  I2C_WAIT_TIP(base);
	  return IORD_OC_I2C_RXR(base);
}                                                        

/* I2C device class definition       */
typedef struct
{
  alt_dev        dev;           /* character mode device  */
  alt_u32        base;          /* base address of open i2c core  */
  alt_u32        irq;           /* interrupt number of open i2c core */
  alt_u32				 cpu_freq;      /* cpu frequency */
  alt_u32        page_size;     /* page buffer size of CAT1025  */
  alt_u32        capacity;      /* capacity of CAT1025        */
  alt_u8         slave_addr;    /* slave address of CAT1025     */
  alt_u8         byte_addr;     /* byte address indicates which byte will be read or written */
  ALT_SEM(read_lock)     /* Semaphore used to protect read operation in multi-threaded mode */
  ALT_SEM(write_lock)    /* Semaphore used to protect write operation in multi-threaded mode */
} gx_cat1025_dev;

/* This function is responsible for performing all the run time initilisation
 * for a device instance
 */

__EXT__ void gx_cat1025_init(int base, gx_cat1025_dev* dev);


__EXT__ int gx_cat1025_read (alt_fd* fd, char* ptr, int len);


__EXT__ int gx_cat1025_write (alt_fd* fd, const char* ptr, int len);

__EXT__ int gx_cat1025_lseek(alt_fd* fd, int ptr, int dir);

/*
 * The macro gx_I2C_INSTANCE is used by the auto-generated file
 * alt_sys_init.c to create an instance of this device driver.
 */

#define OC_I2C_MASTER_INSTANCE(name, dev)        \
  static gx_cat1025_dev dev =                   \
    {                                               \
      {                                             \
        ALT_LLIST_ENTRY,                            \
        name##_NAME,                                \
        NULL, /* open */                            \
        NULL, /* close */                           \
        gx_cat1025_read,                           \
        gx_cat1025_write,                          \
        gx_cat1025_lseek,                          \
        NULL, /* fstat */                           \
        NULL, /* ioctl */                           \
      },                                            \
      name##_BASE,                                  \
      name##_IRQ,                                   \
      ALT_CPU_FREQ,                                 \
      16,   /* max page buffer size = 16 bytes */   \
      256,  /* capability of CAT1025 is 256 bytes*/ \
      0xA0, /* slave address of CAT1025 */          \
      0,    /* byte offset is 0         */          \
    }
    
/*
 * The macro ALTERA_AVALON_UART_INIT is used by the auto-generated file
 * alt_sys_init.c to initialise an instance of the device driver.
 */

#define OC_I2C_MASTER_INIT(name, dev) gx_cat1025_init(name##_BASE, &dev)

#ifdef __cplusplus
}
#endif /* __cplusplus */

#endif /* __OC_I2C_H__ */