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📄 sinouttest.mdl

📁 在simulink环境下实现的正弦信号发生器
💻 MDL
📖 第 1 页 / 共 2 页
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	      InlinedPrmAccess	      "Literals"
	      ReqsInCode	      off
	    }
	    Simulink.GRTTargetCC {
	      $BackupClass	      "Simulink.TargetCC"
	      $ObjectID		      10
	      Array {
		Type			"Cell"
		Dimension		12
		Cell			"IncludeMdlTerminateFcn"
		Cell			"CombineOutputUpdateFcns"
		Cell			"SuppressErrorStatus"
		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		PropName		"DisabledProps"
	      }
	      Version		      "1.1.0"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
	      TargetLibSuffix	      ""
	      TargetPreCompLibLocation ""
	      GenFloatMathFcnCalls    "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
	      GenerateSampleERTMain   off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      Step
      Time		      "1"
      Before		      "0"
      After		      "1"
      SampleTime	      "-1"
      VectorParams1D	      on
      ZeroCross		      on
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "sinOut1"
    Location		    [2, 78, 1022, 717]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "Delay"
      Ports		      [1, 1]
      Position		      [245, 148, 295, 192]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/Delay"
      SourceType	      "Delay AlteraBlockset"
      pipeline		      "1"
      ClockPhase	      "1"
      use_ena		      off
      use_sclr		      off
      use_init		      off
      reset_value	      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "Increment Decrement"
      Ports		      [0, 1]
      Position		      [45, 145, 115, 195]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/Increment Decrement"
      SourceType	      "Increment Decrement AlteraBlockset"
      BusType		      "Signed Integer"
      bwl		      "6"
      bwr		      "8"
      SpecifyClock	      off
      clr_value		      "0"
      direction		      "Increment"
      phase_selection	      "1"
      use_ena		      off
      use_sclr		      off
    }
    Block {
      BlockType		      Reference
      Name		      "Input"
      Ports		      [1, 1]
      Position		      [195, 272, 260, 288]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/Input"
      SourceType	      "Input AlteraBlockset"
      iofile		      "C:\\Program Files\\MATLAB71\\work\\tb_sinOut1\\"
"sinOut1_Input.salt"
      BusType		      "Single Bit"
      bwl		      "8"
      bwr		      "0"
      SpecifyClock	      off
      PORTTYPE		      "Input"
      externalType	      "Inferred"
    }
    Block {
      BlockType		      Reference
      Name		      "Output"
      Ports		      [1, 1]
      Position		      [435, 177, 500, 193]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/Output"
      SourceType	      "Output AlteraBlockset"
      iofile		      "C:\\Program Files\\MATLAB71\\work\\tb_sinOut1\\"
"sinOut1_Output.capture"
      BusType		      "Signed Integer"
      bwl		      "8"
      bwr		      "0"
      externalType	      "Inferred"
      PORTTYPE		      "Output"
    }
    Block {
      BlockType		      Reference
      Name		      "Product"
      Ports		      [2, 1]
      Position		      [340, 156, 405, 209]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/Product"
      SourceType	      "Product AlteraBlockSet"
      BusType		      "Inferred"
      bwl		      "8"
      bwr		      "0"
      pipeline		      "0"
      phase_selection	      "1"
      use_ena		      off
      use_aclr		      off
      UseLPM		      on
      UseDedicatedCircuitry   on
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [2]
      Position		      [535, 177, 565, 213]
      Floating		      off
      Location		      [118, 293, 766, 756]
      Open		      off
      NumInputPorts	      "2"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
	axes2			"%<SignalLabel>"
      }
      TimeRange		      "500"
      YMin		      "-5~-5"
      YMax		      "5~5"
      DataFormat	      "StructureWithTime"
      SampleTime	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "Signal Compiler"
      Ports		      []
      Position		      [190, 15, 259, 62]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/Signal Compiler"
      SourceType	      "Signal Compiler AlteraBlockset"
      DeviceFamily	      "Cyclone"
      DeviceName	      "AUTO"
      EnableSignalTap	      off
      SignalTapDepth	      "128"
      UseBoardBlock	      off
      StpUseDefaultClock      on
      StpClock		      "Clock"
    }
    Block {
      BlockType		      Reference
      Name		      "SinLUT"
      Ports		      [1, 1]
      Position		      [155, 120, 210, 220]
      ForegroundColor	      "blue"
      FontSize		      10
      SourceBlock	      "allblocks_alteradspbuilder2/LUT"
      SourceType	      "LUT AlteraBlockset"
      addr_width	      "6"
      BusType		      "Signed Integer"
      bwl		      "8"
      bwr		      "0"
      init_array	      "127*sin(0:2*pi/(2^6):2*pi)"
      use_ena		      off
      reg_data		      off
      use_lpm		      on
      reg_addr		      on
      ram_type		      "AUTO"
    }
    Block {
      BlockType		      Step
      Name		      "Step"
      Position		      [100, 265, 130, 295]
      Time		      "50"
      Before		      "50"
      SampleTime	      "1"
    }
    Line {
      SrcBlock		      "Increment Decrement"
      SrcPort		      1
      DstBlock		      "SinLUT"
      DstPort		      1
    }
    Line {
      SrcBlock		      "SinLUT"
      SrcPort		      1
      DstBlock		      "Delay"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Input"
      SrcPort		      1
      Points		      [60, 0]
      Branch {
	DstBlock		"Product"
	DstPort			2
      }
      Branch {
	Points			[180, 0; 0, -75]
	DstBlock		"Scope"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Step"
      SrcPort		      1
      DstBlock		      "Input"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Product"
      SrcPort		      1
      DstBlock		      "Output"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay"
      SrcPort		      1
      DstBlock		      "Product"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Output"
      SrcPort		      1
      DstBlock		      "Scope"
      DstPort		      1
    }
  }
}

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