vga4.rpt

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Column  Interconnect    Input Pins     Output Pins     Bidir Pins
01:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
02:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
03:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
04:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
05:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
06:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
07:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
08:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
10:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
11:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
12:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
13:      3/24( 12%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
14:      3/24( 12%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
15:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
16:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
17:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
18:      3/24( 12%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
19:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
20:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
21:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
22:      2/24(  8%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
23:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
24:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:                         d:\max2workpancy\vga4.rpt
vga4

** CLOCK SIGNALS **

Type     Fan-out       Name
DFF         16         clk25
DFF         11         hs2
INPUT        3         color
INPUT        2         mode_key
INPUT        1         clk50


Device-Specific Information:                         d:\max2workpancy\vga4.rpt
vga4

** EQUATIONS **

clk50    : INPUT;
color    : INPUT;
mode_key : INPUT;

-- Node name is 'b' 
-- Equation name is 'b', type is output 
b        =  _LC6_C18;

-- Node name is ':24' = 'cclk0' 
-- Equation name is 'cclk0', location is LC5_C5, type is buried.
cclk0    = DFFE( _EQ001,  clk25,  VCC,  VCC,  VCC);
  _EQ001 = !cclk0 &  _LC3_C1;

-- Node name is ':23' = 'cclk1' 
-- Equation name is 'cclk1', location is LC7_C5, type is buried.
cclk1    = DFFE( _EQ002,  clk25,  VCC,  VCC,  VCC);
  _EQ002 = !cclk0 &  cclk1 &  _LC3_C1
         #  cclk0 & !cclk1 &  _LC3_C1;

-- Node name is ':22' = 'cclk2' 
-- Equation name is 'cclk2', location is LC6_C5, type is buried.
cclk2    = DFFE( _EQ003,  clk25,  VCC,  VCC,  VCC);
  _EQ003 =  cclk2 & !_LC2_C5 &  _LC3_C1
         # !cclk2 &  _LC2_C5 &  _LC3_C1;

-- Node name is ':21' = 'cclk3' 
-- Equation name is 'cclk3', location is LC8_C9, type is buried.
cclk3    = DFFE( _EQ004,  clk25,  VCC,  VCC,  VCC);
  _EQ004 =  cclk3 &  _LC3_C1 & !_LC4_C5
         # !cclk3 &  _LC3_C1 &  _LC4_C5;

-- Node name is ':20' = 'cclk4' 
-- Equation name is 'cclk4', location is LC6_C9, type is buried.
cclk4    = DFFE( _EQ005,  clk25,  VCC,  VCC,  VCC);
  _EQ005 = !cclk3 &  cclk4 &  _LC3_C1
         #  cclk4 &  _LC3_C1 & !_LC4_C5
         #  cclk3 & !cclk4 &  _LC3_C1 &  _LC4_C5;

-- Node name is ':19' = 'cclk5' 
-- Equation name is 'cclk5', location is LC7_C3, type is buried.
cclk5    = DFFE( _EQ006,  clk25,  VCC,  VCC,  VCC);
  _EQ006 =  cclk5 &  _LC3_C1 & !_LC5_C3
         # !cclk5 &  _LC3_C1 &  _LC5_C3;

-- Node name is ':18' = 'cclk6' 
-- Equation name is 'cclk6', location is LC1_C3, type is buried.
cclk6    = DFFE( _EQ007,  clk25,  VCC,  VCC,  VCC);
  _EQ007 = !cclk5 &  cclk6 &  _LC3_C1
         #  cclk6 &  _LC3_C1 & !_LC5_C3
         #  cclk5 & !cclk6 &  _LC3_C1 &  _LC5_C3;

-- Node name is ':17' = 'cclk7' 
-- Equation name is 'cclk7', location is LC2_C3, type is buried.
cclk7    = DFFE( _EQ008,  clk25,  VCC,  VCC,  VCC);
  _EQ008 =  cclk7 &  _LC3_C1 & !_LC8_C3
         # !cclk6 &  cclk7 &  _LC3_C1
         #  cclk6 & !cclk7 &  _LC3_C1 &  _LC8_C3;

-- Node name is ':16' = 'cclk8' 
-- Equation name is 'cclk8', location is LC4_C3, type is buried.
cclk8    = DFFE( _EQ009,  clk25,  VCC,  VCC,  VCC);
  _EQ009 =  cclk8 &  _LC3_C1 & !_LC6_C3
         # !cclk8 &  _LC3_C1 &  _LC6_C3;

-- Node name is ':15' = 'cclk9' 
-- Equation name is 'cclk9', location is LC3_C3, type is buried.
cclk9    = DFFE( _EQ010,  clk25,  VCC,  VCC,  VCC);
  _EQ010 = !cclk8 &  cclk9 &  _LC3_C1
         #  cclk9 &  _LC3_C1 & !_LC6_C3
         #  cclk8 & !cclk9 &  _LC3_C1 &  _LC6_C3;

-- Node name is ':14' = 'clk25' 
-- Equation name is 'clk25', location is LC5_C4, type is buried.
clk25    = DFFE(!clk25, GLOBAL( clk50),  VCC,  VCC,  VCC);

-- Node name is ':38' = 'flag0' 
-- Equation name is 'flag0', location is LC2_C15, type is buried.
flag0    = DFFE( _EQ011, GLOBAL(!color),  VCC,  VCC,  VCC);
  _EQ011 = !flag0 & !flag2
         # !flag0 & !flag1;

-- Node name is ':37' = 'flag1' 
-- Equation name is 'flag1', location is LC3_C15, type is buried.
flag1    = DFFE( _EQ012, GLOBAL(!color),  VCC,  VCC,  VCC);
  _EQ012 =  flag0 & !flag1
         # !flag0 &  flag1 & !flag2;

-- Node name is ':36' = 'flag2' 
-- Equation name is 'flag2', location is LC7_C15, type is buried.
flag2    = DFFE( _EQ013, GLOBAL(!color),  VCC,  VCC,  VCC);
  _EQ013 = !flag1 &  flag2
         #  flag0 &  flag1 & !flag2;

-- Node name is ':43' = 'flag20' 
-- Equation name is 'flag20', location is LC2_C24, type is buried.
flag20   = DFFE(!flag20, GLOBAL(!mode_key),  VCC,  VCC,  VCC);

-- Node name is ':42' = 'flag21' 
-- Equation name is 'flag21', location is LC1_C17, type is buried.
flag21   = DFFE( _EQ014, GLOBAL(!mode_key),  VCC,  VCC,  VCC);
  _EQ014 = !flag20 &  flag21
         #  flag20 & !flag21;

-- Node name is 'g' 
-- Equation name is 'g', type is output 
g        =  _LC1_C18;

-- Node name is 'hs' 
-- Equation name is 'hs', type is output 
hs       =  _LC3_C13;

-- Node name is ':25' = 'hs2' 
-- Equation name is 'hs2', location is LC4_C13, type is buried.
hs2      = DFFE( _EQ015,  clk25,  VCC,  VCC,  VCC);
  _EQ015 = !cclk5 & !cclk6 & !_LC3_C5
         #  _LC2_C13;

-- Node name is 'r' 
-- Equation name is 'r', type is output 
r        =  _LC2_C16;

-- Node name is ':35' = 'vclk0' 
-- Equation name is 'vclk0', location is LC3_A14, type is buried.
vclk0    = DFFE( _EQ016,  hs2,  VCC,  VCC,  VCC);
  _EQ016 = !_LC5_A14 & !vclk0;

-- Node name is ':34' = 'vclk1' 
-- Equation name is 'vclk1', location is LC8_A14, type is buried.
vclk1    = DFFE( _EQ017,  hs2,  VCC,  VCC,  VCC);
  _EQ017 = !_LC5_A14 &  vclk0 & !vclk1
         # !_LC5_A14 & !vclk0 &  vclk1;

-- Node name is ':33' = 'vclk2' 
-- Equation name is 'vclk2', location is LC8_A22, type is buried.
vclk2    = DFFE( _EQ018,  hs2,  VCC,  VCC,  VCC);
  _EQ018 = !_LC5_A14 & !_LC6_A23 &  vclk2
         # !_LC5_A14 &  _LC6_A23 & !vclk2;

-- Node name is ':32' = 'vclk3' 
-- Equation name is 'vclk3', location is LC7_A22, type is buried.
vclk3    = DFFE( _EQ019,  hs2,  VCC,  VCC,  VCC);
  _EQ019 = !_LC5_A14 & !vclk2 &  vclk3
         # !_LC5_A14 & !_LC6_A23 &  vclk3
         # !_LC5_A14 &  _LC6_A23 &  vclk2 & !vclk3;

-- Node name is ':31' = 'vclk4' 
-- Equation name is 'vclk4', location is LC4_A13, type is buried.
vclk4    = DFFE( _EQ020,  hs2,  VCC,  VCC,  VCC);
  _EQ020 = !_LC2_A22 & !_LC5_A14 &  vclk4
         #  _LC2_A22 & !_LC5_A14 & !vclk4;

-- Node name is ':30' = 'vclk5' 
-- Equation name is 'vclk5', location is LC5_A13, type is buried.
vclk5    = DFFE( _EQ021,  hs2,  VCC,  VCC,  VCC);
  _EQ021 = !_LC5_A14 & !vclk4 &  vclk5
         # !_LC2_A22 & !_LC5_A14 &  vclk5
         #  _LC2_A22 & !_LC5_A14 &  vclk4 & !vclk5;

-- Node name is ':29' = 'vclk6' 
-- Equation name is 'vclk6', location is LC2_A13, type is buried.
vclk6    = DFFE( _EQ022,  hs2,  VCC,  VCC,  VCC);
  _EQ022 = !_LC1_A13 & !_LC5_A14 &  vclk6
         #  _LC1_A13 & !_LC5_A14 & !vclk6;

-- Node name is ':28' = 'vclk7' 
-- Equation name is 'vclk7', location is LC8_A13, type is buried.
vclk7    = DFFE( _EQ023,  hs2,  VCC,  VCC,  VCC);
  _EQ023 = !_LC5_A14 & !vclk6 &  vclk7
         # !_LC1_A13 & !_LC5_A14 &  vclk7
         #  _LC1_A13 & !_LC5_A14 &  vclk6 & !vclk7;

-- Node name is ':27' = 'vclk8' 
-- Equation name is 'vclk8', location is LC3_A13, type is buried.
vclk8    = DFFE( _EQ024,  hs2,  VCC,  VCC,  VCC);
  _EQ024 = !_LC5_A14 & !_LC6_A13 &  vclk8
         # !_LC5_A14 &  _LC6_A13 & !vclk8;

-- Node name is ':26' = 'vclk9' 
-- Equation name is 'vclk9', location is LC7_A13, type is buried.
vclk9    = DFFE( _EQ025,  hs2,  VCC,  VCC,  VCC);
  _EQ025 = !_LC5_A14 & !vclk8 &  vclk9
         # !_LC5_A14 & !_LC6_A13 &  vclk9
         # !_LC5_A14 &  _LC6_A13 &  vclk8 & !vclk9;

-- Node name is 'vs' 
-- Equation name is 'vs', type is output 
vs       =  _LC4_A22;

-- Node name is '|LPM_ADD_SUB:164|addcore:adder|:83' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_C5', type is buried 
!_LC2_C5 = _LC2_C5~NOT;
_LC2_C5~NOT = LCELL( _EQ026);
  _EQ026 = !cclk1
         # !cclk0;

-- Node name is '|LPM_ADD_SUB:164|addcore:adder|:95' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_C3', type is buried 
_LC5_C3  = LCELL( _EQ027);
  _EQ027 =  cclk3 &  cclk4 &  _LC4_C5;

-- Node name is '|LPM_ADD_SUB:164|addcore:adder|:99' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_C3', type is buried 
_LC8_C3  = LCELL( _EQ028);
  _EQ028 =  cclk5 &  _LC5_C3;

-- Node name is '|LPM_ADD_SUB:164|addcore:adder|:107' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_C3', type is buried 
_LC6_C3  = LCELL( _EQ029);
  _EQ029 =  cclk5 &  cclk6 &  cclk7 &  _LC5_C3;

-- Node name is '|LPM_ADD_SUB:681|addcore:adder|:83' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_A23', type is buried 
_LC6_A23 = LCELL( _EQ030);
  _EQ030 =  vclk0 &  vclk1;

-- Node name is '|LPM_ADD_SUB:681|addcore:adder|:91' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_A22', type is buried 
_LC2_A22 = LCELL( _EQ031);
  _EQ031 =  _LC6_A23 &  vclk2 &  vclk3;

-- Node name is '|LPM_ADD_SUB:681|addcore:adder|:99' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_A13', type is buried 
_LC1_A13 = LCELL( _EQ032);
  _EQ032 =  _LC2_A22 &  vclk4 &  vclk5;

-- Node name is '|LPM_ADD_SUB:681|addcore:adder|:107' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_A13', type is buried 
_LC6_A13 = LCELL( _EQ033);
  _EQ033 =  _LC1_A13 &  vclk6 &  vclk7;

-- Node name is ':4' 
-- Equation name is '_LC3_C13', type is buried 
_LC3_C13 = DFFE( _EQ034,  clk25,  VCC,  VCC,  VCC);
  _EQ034 = !cclk5 & !cclk6 & !_LC3_C5