📄 jpeg.h
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#define REG_RESIZER_STATUS *((volatile unsigned int *) (RESIZER_base + 0x08))
#define REG_RESIZER_INT_STATUS *((volatile unsigned int *) (RESIZER_base + 0x0C))
#define REG_RESIZER_SOURCE_IMAGE_SIZE *((volatile unsigned int *) (RESIZER_base + 0x10))
#define REG_RESIZER_TARGET_IMAGE_SIZE *((volatile unsigned int *) (RESIZER_base + 0x14))
#define REG_RESIZER_H_RATIO *((volatile unsigned int *) (RESIZER_base + 0x18))
#define REG_RESIZER_V_RATIO *((volatile unsigned int *) (RESIZER_base + 0x1C))
#define REG_RESIZER_H_RESIDUAL *((volatile unsigned int *) (RESIZER_base + 0x20))
#define REG_RESIZER_V_RESIDUAL *((volatile unsigned int *) (RESIZER_base + 0x24))
#define REG_RESIZER_BLOCK_CS_CFG *((volatile unsigned int *) (RESIZER_base + 0x30))
#define REG_RESIZER_Y_LINE_BUFFER_ADDR *((volatile unsigned int *) (RESIZER_base + 0x34))
#define REG_RESIZER_U_LINE_BUFFER_ADDR *((volatile unsigned int *) (RESIZER_base + 0x38))
#define REG_RESIZER_V_LINE_BUFFER_ADDR *((volatile unsigned int *) (RESIZER_base + 0x3C))
#define REG_RESIZER_FINE_RESIZE_CFG *((volatile unsigned int *) (RESIZER_base + 0x40))
#define REG_RESIZER_LINE_BUFFER_SIZE *((volatile unsigned int *) (RESIZER_base + 0x50))
#define REG_RESIZER_WORK_MEM_ADDR *((volatile unsigned int *) (RESIZER_base + 0x5C))
#define REG_RESIZER_YUV2RGB_CFG *((volatile unsigned int *) (RESIZER_base + 0x80))
#define REG_RESIZER_TARGET_MEM_ADDR *((volatile unsigned int *) (RESIZER_base + 0x84))
/* bit mapping of resizer control register */
#define RESIZER_CTRL_RESET_MASK 0x000F0000
#define RESIZER_CTRL_ENABLE_MASK 0x0000000F
#define RESIZER_CTRL_BLOCK_CS_ENABLE_BIT 0x00000001
#define RESIZER_CTRL_HR_ENABLE_BIT 0x00000002
#define RESIZER_CTRL_VR_ENABLE_BIT 0x00000004
#define RESIZER_CTRL_YUV2RGB_ENABLE_BIT 0x00000008
#define RESIZER_CTRL_BLOCK_CS_RESET_BIT 0x00010000
#define RESIZER_CTRL_HR_RESET_BIT 0x00020000
#define RESIZER_CTRL_VR_RESET_BIT 0x00040000
#define RESIZER_CTRL_YUV2RGB_RESET_BIT 0x00080000
/* bit mapping of resizer status register */
#define RESIZER_STAT_BLOCK_CS_BUSY_BIT 0x00000001
#define RESIZER_STAT_HR_BUSY_BIT 0x00000002
#define RESIZER_STAT_VR_BUSY_BIT 0x00000004
#define RESIZER_STAT_YUV2RGB_BUSY_BIT 0x00000008
#define RESIZER_STAT_BLOCK_CS_INTRA_BUSY_BIT 0x00000010
/* bit mapping of resizer interrupt status register */
#define RESIZER_INT_STAT_BLOCK_CS_BIT 0x00000001
#define RESIZER_INT_STAT_HR_BIT 0x00000002
#define RESIZER_INT_STAT_VR_BIT 0x00000004
#define RESIZER_YUV2RGB_INT_STATUS_BIT 0x00000008
#define RESIZER_YUV2RGB_INT_ENABLE_BIT 0x00008000
#define RESIZER_BLOCK_CS_INT_ENABLE_BIT 0x00010000
#define RESIZER_HR_INT_ENABLE_BIT 0x00000010
#define RESIZER_VR_INT_ENABLE_BIT 0x00000020
/* bit mapping of resizer source and target size register */
#define RESIZER_IMAGE_SIZE_WIDTH_MASK 0x000007FF
#define RESIZER_IMAGE_SIZE_HEIGHT_MASK 0x07FF0000
/* bit mapping of resizer block coarse shrink config register */
#define RESIZER_BLOCk_CS_CFG_V_V_SAMPLE_FACTOR_MASK 0x0000C000
#define RESIZER_BLOCk_CS_CFG_V_H_SAMPLE_FACTOR_MASK 0x00003000
#define RESIZER_BLOCk_CS_CFG_U_V_SAMPLE_FACTOR_MASK 0x00000C00
#define RESIZER_BLOCk_CS_CFG_U_H_SAMPLE_FACTOR_MASK 0x00000300
#define RESIZER_BLOCk_CS_CFG_Y_V_SAMPLE_FACTOR_MASK 0x000000C0
#define RESIZER_BLOCk_CS_CFG_Y_H_SAMPLE_FACTOR_MASK 0x00000030
#define RESIZER_BLOCk_CS_CFG_CS_FACTOR_MASK 0x00000003
/* definition of resizer block CS register */
#define BLOCK_CS_1_1 0x00000000
#define BLOCK_CS_1_4 0x00000001
#define BLOCK_CS_1_16 0x00000002
#define BLOCK_CS_1_64 0x00000003
#define BLOCK_Y_H_FACTOR_1 0x00000000
#define BLOCK_Y_H_FACTOR_2 0x00000010
#define BLOCK_Y_H_FACTOR_4 0x00000020
#define BLOCK_Y_H_FACTOR_0 0x00000030
#define BLOCK_Y_V_FACTOR_1 0x00000000
#define BLOCK_Y_V_FACTOR_2 0x00000040
#define BLOCK_Y_V_FACTOR_4 0x00000080
#define BLOCK_Y_V_FACTOR_0 0x000000C0
#define BLOCK_U_H_FACTOR_1 0x00000000
#define BLOCK_U_H_FACTOR_2 0x00000100
#define BLOCK_U_H_FACTOR_4 0x00000200
#define BLOCK_U_H_FACTOR_0 0x00000300
#define BLOCK_U_V_FACTOR_1 0x00000000
#define BLOCK_U_V_FACTOR_2 0x00000400
#define BLOCK_U_V_FACTOR_4 0x00000800
#define BLOCK_U_V_FACTOR_0 0x00000C00
#define BLOCK_V_H_FACTOR_1 0x00000000
#define BLOCK_V_H_FACTOR_2 0x00001000
#define BLOCK_V_H_FACTOR_4 0x00002000
#define BLOCK_V_H_FACTOR_0 0x00003000
#define BLOCK_V_V_FACTOR_1 0x00000000
#define BLOCK_V_V_FACTOR_2 0x00004000
#define BLOCK_V_V_FACTOR_4 0x00008000
#define BLOCK_V_V_FACTOR_0 0x0000C000
/* bit mapping of resizer fine resize config register */
#define RESIZER_FINE_RESIZE_WORK_MEM_SIZE_MASK 0xFFFF0000
/* bit mapping of resizer line buffer size register */
#define RESIZER_BLOCk_CS_LINE_BUFF_SIZE_MASK 0x0000FFFF
/* Macros of resizer control register */
#define RESET_RESIZER REG_RESIZER_CTRL=RESIZER_CTRL_RESET_MASK;\
REG_RESIZER_CTRL=0;
#define SET_BLOCK_CS_RESET REG_RESIZER_CTRL |= RESIZER_CTRL_BLOCK_CS_RESET_BIT;
#define CLEAR_BLOCK_CS_RESET REG_RESIZER_CTRL &= ~RESIZER_CTRL_BLOCK_CS_RESET_BIT;
#define SET_HR_RESET REG_RESIZER_CTRL |= RESIZER_CTRL_HR_RESET_BIT;
#define CLEAR_HR_RESET REG_RESIZER_CTRL &= ~RESIZER_CTRL_HR_RESET_BIT;
#define SET_VR_RESET REG_RESIZER_CTRL |= RESIZER_CTRL_VR_RESET_BIT;
#define CLEAR_VR_RESET REG_RESIZER_CTRL &= ~RESIZER_CTRL_VR_RESET_BIT;
#define SET_YUV2RGB_RESET REG_RESIZER_CTRL |= RESIZER_CTRL_YUV2RGB_RESET_BIT;
#define CLEAR_YUV2RGB_RESET REG_RESIZER_CTRL &= ~RESIZER_CTRL_YUV2RGB_RESET_BIT;
#define ENABLE_BLOCK_CS_BLOCK REG_RESIZER_CTRL |= RESIZER_CTRL_BLOCK_CS_ENABLE_BIT
#define DISABLE_BLOCK_CS_BLOCK REG_RESIZER_CTRL &= ~RESIZER_CTRL_BLOCK_CS_ENABLE_BIT
#define ENABLE_HR_BLOCK REG_RESIZER_CTRL |= RESIZER_CTRL_HR_ENABLE_BIT
#define DISABLE_HR_BLOCK REG_RESIZER_CTRL &= ~RESIZER_CTRL_HR_ENABLE_BIT
#define ENABLE_VR_BLOCK REG_RESIZER_CTRL |= RESIZER_CTRL_VR_ENABLE_BIT
#define DISABLE_VR_BLOCK REG_RESIZER_CTRL &= ~RESIZER_CTRL_VR_ENABLE_BIT
#define ENABLE_YUV2RGB_BLOCK REG_RESIZER_CTRL |= RESIZER_CTRL_YUV2RGB_ENABLE_BIT
#define DISABLE_YUV2RGB_BLOCK REG_RESIZER_CTRL &= ~RESIZER_CTRL_YUV2RGB_ENABLE_BIT
#define ENABLE_RESIZER REG_RESIZER_CTRL = RESIZER_CTRL_ENABLE_MASK;
/* Macros of resizer status register */
#define IS_BLOCK_CS_BUSY (REG_RESIZER_STATUS & RESIZER_STAT_BLOCK_CS_BUSY_BIT)
#define IS_HR_BUSY (REG_RESIZER_STATUS & RESIZER_STAT_HR_BUSY_BIT)
#define IS_VR_BUSY (REG_RESIZER_STATUS & RESIZER_STAT_VR_BUSY_BIT)
#define IS_YUV2RGB_BUSY (REG_RESIZER_STATUS & RESIZER_STAT_YUV2RGB_BUSY_BIT)
/* Macros of resizer source image size register */
#define SET_RESIZER_SRC_SIZE(width, height) REG_RESIZER_SOURCE_IMAGE_SIZE=(width|(height<<16));
/* Macros of resizer target image size register */
#define SET_RESIZER_TARGET_SIZE(width, height) REG_RESIZER_TARGET_IMAGE_SIZE=(width|(height<<16));
/* Macros of resizer block coarse shrinking config register */
#define SET_RESIZER_BLOCK_CS_V_V_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_V_V_SAMPLE_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= ((factor>>1)<<14);
#define SET_RESIZER_BLOCK_CS_V_H_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_V_H_SAMPLE_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= ((factor>>1)<<12);
#define SET_RESIZER_BLOCK_CS_U_V_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_U_V_SAMPLE_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= ((factor>>1)<<10);
#define SET_RESIZER_BLOCK_CS_U_H_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_U_H_SAMPLE_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= ((factor>>1)<<8);
#define SET_RESIZER_BLOCK_CS_Y_V_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_Y_V_SAMPLE_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= ((factor>>1)<<6);
#define SET_RESIZER_BLOCK_CS_Y_H_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_Y_H_SAMPLE_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= ((factor>>1)<<4);
#define SET_RESIZER_BLOCK_CS_FACTOR(factor) REG_RESIZER_BLOCK_CS_CFG &= ~RESIZER_BLOCk_CS_CFG_CS_FACTOR_MASK;\
REG_RESIZER_BLOCK_CS_CFG |= factor;
/* macros of resizer fine resizer config register */
#define SET_RESIZER_FINE_RESIZE_WORK_MEM_SIZE(line) REG_RESIZER_FINE_RESIZE_CFG &= ~RESIZER_FINE_RESIZE_WORK_MEM_SIZE_MASK;\
REG_RESIZER_FINE_RESIZE_CFG |= (line<<16);
/* macros of resizer YUV2RGB config register */
#define ENABLE_RESIZER_YUV2RGB_INT REG_RESIZER_YUV2RGB_CFG |= RESIZER_YUV2RGB_INT_ENABLE_BIT;
#define DISABLE_RESIZER_YUV2RGB_INT REG_RESIZER_YUV2RGB_CFG &= ~RESIZER_YUV2RGB_INT_ENABLE_BIT;
/* macros of resizer line buffer size register */
#define SET_RESIZER_CS_LINE_BUFFER(n) REG_RESIZER_LINE_BUFFER_SIZE &= ~RESIZER_BLOCk_CS_LINE_BUFF_SIZE_MASK; \
REG_RESIZER_LINE_BUFFER_SIZE |= n;
/* macros of resizer interrupt status register */
#define IS_RESIZER_COMPLETE_INT (REG_RESIZER_INT_STATUS & RESIZER_YUV2RGB_INT_STATUS_BIT)
#endif /* MT6218B, MT6217 */
#if (defined(JPEG_DRV_V2))
#define REG_RESIZER_STATUS *((volatile unsigned int *) (RESIZER_base + 0x08))
#define RESIZER_CTRL_BLOCK_CS_BUSY_BIT 0x00000001
#define RESIZER_CTRL_HR_BUSY_BIT 0x00000002
#define RESIZER_CTRL_VR_BUSY_BIT 0x00000004
#define IS_BLOCK_CS_BUSY (REG_RESIZER_STATUS & RESIZER_CTRL_BLOCK_CS_BUSY_BIT)
#define IS_HR_BUSY (REG_RESIZER_STATUS & RESIZER_CTRL_HR_BUSY_BIT)
#define IS_VR_BUSY (REG_RESIZER_STATUS & RESIZER_CTRL_VR_BUSY_BIT)
#elif (defined(JPEG_DRV_V3))
#define REG_PRZ_STATUS *((volatile unsigned int *) (PRZ_base + 0x08))
#define PRZ_CTRL_BLOCK_CS_BUSY_BIT 0x00000001
#define PRZ_CTRL_HR_BUSY_BIT 0x00000002
#define PRZ_CTRL_VR_BUSY_BIT 0x00000004
#define IS_BLOCK_CS_BUSY (REG_PRZ_STATUS & PRZ_CTRL_BLOCK_CS_BUSY_BIT)
#define IS_HR_BUSY (REG_PRZ_STATUS & PRZ_CTRL_HR_BUSY_BIT)
#define IS_VR_BUSY (REG_PRZ_STATUS & PRZ_CTRL_VR_BUSY_BIT)
#endif
/* markers of JPEG standard */
#define JPEG_MARKER_SOF0 0xC0
#define JPEG_MARKER_SOF1 0xC1
#define JPEG_MARKER_SOF2 0xC2
#define JPEG_MARKER_SOF3 0xC3
#define JPEG_MARKER_SOF5 0xC5
#define JPEG_MARKER_SOF6 0xC6
#define JPEG_MARKER_SOF7 0xC7
#define JPEG_MARKER_SOF9 0xC9
#define JPEG_MARKER_SOF10 0xCA
#define JPEG_MARKER_SOF11 0xCB
#define JPEG_MARKER_SOF13 0xCD
#define JPEG_MARKER_SOF14 0xCE
#define JPEG_MARKER_SOF15 0xCF
#define JPEG_MARKER_DHT 0xC4
#define JPEG_MARKER_DAC 0xCC
#define JPEG_MARKER_RST0 0xD0
#define JPEG_MARKER_RST1 0xD1
#define JPEG_MARKER_RST2 0xD2
#define JPEG_MARKER_RST3 0xD3
#define JPEG_MARKER_RST4 0xD4
#define JPEG_MARKER_RST5 0xD5
#define JPEG_MARKER_RST6 0xD6
#define JPEG_MARKER_RST7 0xD7
#define JPEG_MARKER_SOI 0xD8
#define JPEG_MARKER_EOI 0xD9
#define JPEG_MARKER_SOS 0xDA
#define JPEG_MARKER_DQT 0xDB
#define JPEG_MARKER_DNL 0xDC
#define JPEG_MARKER_DRI 0xDD
#define JPEG_MARKER_DHP 0xDE
#define JPEG_MARKER_EXP 0xDF
#define JPEG_MARKER_APP0 0xE0
#define JPEG_MARKER_APP1 0xE1
#define JPEG_MARKER_APP2 0xE2
#define JPEG_MARKER_APP3 0xE3
#define JPEG_MARKER_APP4 0xE4
#define JPEG_MARKER_APP5 0xE5
#define JPEG_MARKER_APP15 0xEF
#define JPEG_MARKER_JPG0 0xF0
#define JPEG_MARKER_JPG14 0xFD
#define JPEG_MARKER_COM 0xFE
/* definition of TAG ID for EXIF file */
#define EXIF_TAG_IMAGE_WIDTH 0x0100
#define EXIF_TAG_IMAGE_HEIGHT 0x0101
#define EXIF_TAG_COMPRESSION 0x0103
#define EXIF_TAG_PIXEL_COMPOSITION 0x0106
#define EXIF_TAG_STRIP_OFFSET 0x0111
#define EXIF_TAG_JPEG_SOI_OFFSET 0x0201
#define EXIF_TAG_JPEG_SIZE 0x0202
#define EXIF_NON_COMPRESSED 1
#define EXIF_JPEG_COMPRESSED 6
#define EXIF_NON_COMPRESSED_RGB 2
#define EXIF_NON_COMPRESSED_YUV 6
#define EXIF_TAG_TYPE_SHORT 3
#define EXIF_TAG_TYPE_LONG 4
#define NO_THUMBNAIL_MODE 0
#define JFIF_MODE_RGB 1
#define JFIF_EXTENSION_MODE_RGB 2
#define JFIF_EXTENSION_MODE_JPEG 3
#define EXIF_MODE_RGB 4
#define EXIF_MODE_JPEG 5
typedef struct
{
kal_bool jpg_progressive;
kal_uint16 jpg_width;
kal_uint16 jpg_height;
kal_uint16 jpg_decode_width; /* picture width after decode with dummy data */
kal_uint16 jpg_decode_height; /* picture width after decode with dummy data */
kal_uint8 jpg_precision;
kal_uint8 number_of_component;
kal_uint8 y_h_sample_factor;
kal_uint8 y_v_sample_factor;
kal_uint8 u_h_sample_factor;
kal_uint8 u_v_sample_factor;
kal_uint8 v_h_sample_factor;
kal_uint8 v_v_sample_factor;
kal_uint8 max_h_sample_factor;
kal_uint8 max_v_sample_factor;
kal_uint8 component_id1;
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