resizer.h

最新MTK手机软件源码

/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE.
*
*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/

/*****************************************************************************
 *
 * Filename:
 * ---------
 *    resizer.h
 *
 * Project:
 * --------
 *   Maui_Software
 *
 * Description:
 * ------------
 *   Header file of resizer
 *
 * Author:
 * -------
 * -------
 *
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 * removed!
 *
 * removed!
 * removed!
 *
 * removed!
 * removed!
 *
 *------------------------------------------------------------------------------
 * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *============================================================================
 ****************************************************************************/
#ifndef RESIZER_H
#define RESIZER_H

#if (defined(MT6219)||defined(MT6226)||defined(MT6226M)||defined(MT6227))
#define RESZ_BASE				(RESIZER_base)
// registers
#define RESZ_CFG				RESZ_BASE+0
#define RESZ_CON				RESZ_BASE+0x4
#define RESZ_STA				RESZ_BASE+0x8
#define RESZ_INT				RESZ_BASE+0xc
#define RESZ_SRCSZ1			RESZ_BASE+0x10
#define RESZ_TARSZ1			RESZ_BASE+0x14
#define RESZ_HRATIO1			RESZ_BASE+0x18
#define RESZ_VRATIO1			RESZ_BASE+0x1c
#define RESZ_HRES1			RESZ_BASE+0x20
#define RESZ_VRES1			RESZ_BASE+0x24
#define RESZ_BLKCSCFG		RESZ_BASE+0x30
#define RESZ_YLMBASE			RESZ_BASE+0x34
#define RESZ_ULMBASE			RESZ_BASE+0x38
#define RESZ_VLMBASE			RESZ_BASE+0x3c
#define RESZ_FRCFG			RESZ_BASE+0x40
#define RESZ_YWMBASE			RESZ_BASE+0x44
#define RESZ_UWMBASE			RESZ_BASE+0x48
#define RESZ_VWMBASE			RESZ_BASE+0x4c
#define RESZ_YLBSIZE			RESZ_BASE+0x50
#define RESZ_ULBSIZE			RESZ_BASE+0x54
#define RESZ_VLBSIZE			RESZ_BASE+0x58
#define RESZ_PRWMBASE		RESZ_BASE+0x5c
#define RESZ_SRCSZ2			RESZ_BASE+0x60
#define RESZ_TARSZ2			RESZ_BASE+0x64
#define RESZ_HRATIO2			RESZ_BASE+0x68
#define RESZ_VRATIO2			RESZ_BASE+0x6c
#define RESZ_HRES2			RESZ_BASE+0x70
#define RESZ_VRES2			RESZ_BASE+0x74

// bit mask
#define RESZ_CFG_PELSRC1	0x0000000f
#define RESZ_CFG_PCON		0x00000010
#define RESZ_CFG_PSEL		0x00000020
#define RESZ_CFG_PRUN		0x00000040
#define RESZ_CFG_PELSRC2	0x00000f00
#define RESZ_CFG_BWA0		0x000f0000
#define RESZ_CFG_BWB0		0x00f00000
#define RESZ_CFG_BWA1		0x0f000000
#define RESZ_CFG_BWB1		0xf0000000

#define RESZ_CON_BLKCSENA			0x00000001
#define RESZ_CON_BLKHRENA			0x00000002
#define RESZ_CON_BLKVRENA			0x00000004
#define RESZ_CON_PELHRENA			0x00000020
#define RESZ_CON_PELVRENA			0x00000040
#define RESZ_CON_BLKCSRST			0x00010000
#define RESZ_CON_BLKHRRST			0x00020000
#define RESZ_CON_BLKVRRST			0x00040000
#define RESZ_CON_PELHRRST			0x00200000
#define RESZ_CON_PELVRRST			0x00400000

#define RESZ_STA_BLKCSBUSY			0x00000001
#define RESZ_STA_BLKHRBUSY			0x00000002
#define RESZ_STA_BLKVRBUSY			0x00000004
#define RESZ_STA_PELHRBUSY			0x00000020
#define RESZ_STA_PELVRBUSY			0x00000040
#define RESZ_STA_P2NDRUN			0x00000080

#define RESZ_INT_BLKCSINT			0x00000001
#define RESZ_INT_BLKHRINT			0x00000002
#define RESZ_INT_BLKVRINT			0x00000004
#define RESZ_INT_PELHRINT			0x00000002
#define RESZ_INT_PELVRINT			0x00000004

#define RESZ_HRES1_MAX				2046
#define RESZ_VRES1_MAX				2046

#define RESZ_BLKCSCFG_CSF			0x00000003
#define RESZ_BLKCSCFG_HY			0x00000030
#define RESZ_BLKCSCFG_VY			0x000000c0
#define RESZ_BLKCSCFG_HU			0x00000300
#define RESZ_BLKCSCFG_VU			0x00000c00
#define RESZ_BLKCSCFG_HV			0x00003000
#define RESZ_BLKCSCFG_VV			0x0000c000
#define RESZ_BLKCSCFG_INTEN		0x00010000

#define RESZ_FRCFG_VRSS				0x00000001
#define RESZ_FRCFG_HRINTEN			0x00000010
#define RESZ_FRCFG_VRINTEN			0x00000020
#define RESZ_FRCFG_PCSF1			0x00000300
#define RESZ_FRCFG_PCSF2			0x00000c00
#define RESZ_FRCFG_SEQ				0x00008000
#define RESZ_FRCFG_WMSZ				0xffff0000

   #if (defined(MT6219))
   #define RESZ_H_RATIO_SHIFT_BITS  21
   #define RESZ_V_RATIO_SHIFT_BITS  21
   #elif (defined(MT6226)||defined(MT6226M)||defined(MT6227))
   #define RESZ_H_RATIO_SHIFT_BITS  20
   #define RESZ_V_RATIO_SHIFT_BITS  20
   #endif
// NOte: block mode stands for JPEG decoder
typedef enum{
	SRC_CAMERA = 0,
	SRC_MPEG4 = 1,
	SRC_PNG = 2,
	SRC_GIF = 3,
	SRC_MEM = 4,
	SRC_JPEG_DECODER = 5
}RESZ_PXL_SRC_ENUM;

typedef enum{
	RESZ_INIT,
	RESZ_READY,
	RESZ_BUSY
}RESZ_STATE_ENUM;

typedef enum{
	RESZ_CS_1_1 = 0,
	RESZ_CS_1_4 = 1,
	RESZ_CS_1_16 = 2,
	RESZ_CS_1_64 = 3
}RESZ_CS_FACTOR_ENUM;

typedef enum{
	RESZ_HY_SF_1 = 0,
	RESZ_HY_SF_2 = 1,
	RESZ_HY_SF_4 = 2,
	RESZ_HY_SF_NONE = 3
}RESZ_HY_SAMPLING_FACTOR_ENUM;

typedef enum{
	RESZ_VY_SF_1 = 0,
	RESZ_VY_SF_2 = 1,
	RESZ_VY_SF_4 = 2,
	RESZ_VY_SF_NONE = 3
}RESZ_VY_SAMPLING_FACTOR_ENUM;

typedef enum{
	RESZ_HU_SF_1 = 0,
	RESZ_HU_SF_2 = 1,
	RESZ_HU_SF_4 = 2,
	RESZ_HU_SF_NONE = 3
}RESZ_HU_SAMPLING_FACTOR_ENUM;

typedef enum{
	RESZ_VU_SF_1 = 0,
	RESZ_VU_SF_2 = 1,
	RESZ_VU_SF_4 = 2,
	RESZ_VU_SF_NONE = 3
}RESZ_VU_SAMPLING_FACTOR_ENUM;

typedef enum{
	RESZ_HV_SF_1 = 0,
	RESZ_HV_SF_2 = 1,
	RESZ_HV_SF_4 = 2,
	RESZ_HV_SF_NONE = 3
}RESZ_HV_SAMPLING_FACTOR_ENUM;

typedef enum{
	RESZ_VV_SF_1 = 0,
	RESZ_VV_SF_2 = 1,
	RESZ_VV_SF_4 = 2,
	RESZ_VV_SF_NONE = 3