imgdma.h

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	#define IMGDMA_IBR2_PHOTO_FRAME_MODE_MASK	0x00000006
	#define IMGDMA_IBR2_INT_BIT					0x00000001

	#define IMGDMA_IBR2_1BPP_PHOTO_FRAME		0x00000000
	#define IMGDMA_IBR2_2BPP_PHOTO_FRAME		0x00000002
	#define IMGDMA_IBR2_4BPP_PHOTO_FRAME		0x00000004
	#define IMGDMA_IBR2_8BPP_PHOTO_FRAME		0x00000006

	#define OVERLAY_1BPP_PHOTO_FRAME				IMGDMA_IBR2_1BPP_PHOTO_FRAME
	#define OVERLAY_2BPP_PHOTO_FRAME				IMGDMA_IBR2_2BPP_PHOTO_FRAME
	#define OVERLAY_4BPP_PHOTO_FRAME				IMGDMA_IBR2_4BPP_PHOTO_FRAME
	#define OVERLAY_8BPP_PHOTO_FRAME				IMGDMA_IBR2_8BPP_PHOTO_FRAME

	/* bit mapping of IBR2 configuration register */
	#define IMGDMA_IBR2_SRC_KEY_COLOR_MASK		0x0000FF00
	#define IMGDMA_IBR2_V_SCALE_RATIO_MASK		0x000000F0
	#define IMGDMA_IBR2_H_SCALE_RATIO_MASK		0x0000000F

	/* macros of IBR2 start register */
	#define START_IBR2								REG_IMGDMA_IBR2_START=1;
	#define STOP_IBR2									REG_IMGDMA_IBR2_START=0;

	/* macros of IBR2 control register */
	#define SET_IMGDMA_IBR2_SRC_CRZ				REG_IMGDMA_IBR2_CTRL &= ~IMGDMA_IBR2_PIXEL_SEL_BIT;
	#define SET_IMGDMA_IBR2_SRC_PRZ				REG_IMGDMA_IBR2_CTRL |= IMGDMA_IBR2_PIXEL_SEL_BIT;
	#define ENABLE_IMGDMA_IBR2_PALETTE			REG_IMGDMA_IBR2_CTRL |= IMGDMA_IBR2_PALETTE_ENABLE_BIT;
	#define DISABLE_IMGDMA_IBR2_PALETTE			REG_IMGDMA_IBR2_CTRL &= ~IMGDMA_IBR2_PALETTE_ENABLE_BIT;
	#define ENABLE_IMGDMA_IBR2_AUTO_RESTART	REG_IMGDMA_IBR2_CTRL |= IMGDMA_IBR2_AUTO_RESTART_BIT;
	#define DISABLE_IMGDMA_IBR2_AUTO_RESTART	REG_IMGDMA_IBR2_CTRL &= ~IMGDMA_IBR2_AUTO_RESTART_BIT;
	#define SET_IMGDMA_IBR2_PHOTO_FRAME_DEPTH(n)	REG_IMGDMA_IBR2_CTRL &= ~IMGDMA_IBR2_PHOTO_FRAME_MODE_MASK;\
																REG_IMGDMA_IBR2_CTRL |= n;
	#define ENABLE_IMGDMA_IBR2_INT				REG_IMGDMA_IBR2_CTRL |= IMGDMA_IBR2_INT_BIT;
	#define DISABLE_IMGDMA_IBR2_INT				REG_IMGDMA_IBR2_CTRL &= ~IMGDMA_IBR2_INT_BIT;

	/* macros of IBR2 config register */
	#define SET_IMGDMA_IBR2_SRC_KEY(color)		REG_IMGDMA_IBR2_CONFIG &= ~IMGDMA_IBR2_SRC_KEY_COLOR_MASK;\
															REG_IMGDMA_IBR2_CONFIG |= (color<<8);
	#define SET_IMGDMA_IBR2_V_RATIO(ratio)		REG_IMGDMA_IBR2_CONFIG &= ~IMGDMA_IBR2_V_SCALE_RATIO_MASK;\
															REG_IMGDMA_IBR2_CONFIG |= (ratio<<4);
	#define SET_IMGDMA_IBR2_H_RATIO(ratio)		REG_IMGDMA_IBR2_CONFIG &= ~IMGDMA_IBR2_H_SCALE_RATIO_MASK;\
															REG_IMGDMA_IBR2_CONFIG |= ratio;

typedef enum
{
	IBR1_TYPE_RGB565,
	IBR1_TYPE_RGB888
}IMGDMA_DATA_TYPE_ENUM;

typedef enum
{
	IBR1_ORDER_BGR888,
	IBR1_ORDER_RGB888
}IMGDMA_DATA_ORDER_ENUM;

#define DATA_ORDER_RGB888		0
#define DATA_ORDER_BGR888		1

void init_image_dma(void);
void set_overlay_palette(kal_uint8 palette_size,kal_uint32 *palette_addr_ptr);

/*add for 6228/6229*/
typedef void (*IDMA_Callback)(void);

typedef enum{
	IMGDMA_JPEG_CH,
	IMGDMA_VDO_CH,
	IMGDMA_IBW1_CH,
	IMGDMA_IBW2_CH,
	IMGDMA_IBR1_CH,
	IMGDMA_ALL_CH
}IMGDMA_CHANNEL_ENUM;

typedef enum{
	IMGDMA_MPEG4_DECODE,
	IMGDMA_MPEG4_ENCODE
}IMGDMA_DIR_ENUM;


typedef enum{
	IMGDMA_INIT,
	IMGDMA_READY,
	IMGDMA_BUSY
}IMGDMA_STATE_ENUM;

typedef enum{
	IMGDMA_STOP_NOW,
	IMGDMA_STOP_CALLBACK,	// for channel without enable auto_restart
	IMGDMA_STOP_AT_FRAME_BOUNDARY, // for channel eanbled auto_restart
	IMGDMA_STOP_IDLE
}IMGDMA_STOP_ENUM;

typedef enum{
   PIXEL_ENGINE_IPP1,
   PIXEL_ENGINE_IPP2,
   PIXEL_ENGINE_PRZ,   
   PIXEL_ENGINE_CRZ,
   PIXEL_ENGINE_DRZ,
   PIXEL_ENGINE_NONE
}IMGDMA_PIXEL_ENGINE_ENUM;   


/*XXXXX add in 2006/04/24*/
typedef enum
{
	IMGDMA_OUTPUT_TYPE_RGB565,
	IMGDMA_OUTPUT_TYPE_RGB888
}IMGDMA_OUTPUT_TYPE_ENUM;


typedef struct{
	kal_uint32 bs;	// line buffer base address
	kal_uint16 width;	// image width(minus 1 before writing to register)
	kal_uint16 height; // image height
	kal_uint16 fifo;	// fifo length
	kal_bool gray; // 1: for gray mode, 0: for color mode
	IDMA_Callback cb;	// interrupt callback function NULL: disable interrupt
}IMGDMA_JPEG_STRUCT;

typedef struct{
	IMGDMA_DIR_ENUM dir;	// 1: for MEPG4 encode, 0: for MPEG4 decode
	kal_bool	twice;	// 1: enable twice resizing 0: disable
	kal_bool restart; // 1: automatic reastart while current frame is finished
	kal_uint32 bs1;	// first base address
	kal_uint32 bs2;	// second base address
	kal_uint16 width;	// frame width (1 stands for 1)(max 255)
	kal_uint16 height;	// frame height
	void (*cb1)(kal_uint32 yuv_address);	// interrupt callback function NULL: disable interrupt(first run)
	IDMA_Callback cb2;	// interrupt callback function NULL: disable interrupt(second run)
}IMGDMA_VDO_STRUCT;

typedef struct{
	kal_uint32 bs;	      /*buffer base address*/
	kal_uint16 width;    /*image width*/
	kal_uint16 height;   /*image height*/
	IMGDMA_PIXEL_ENGINE_ENUM 	pixel_engine;/*define pixel engine*/
	IMGDMA_OUTPUT_TYPE_ENUM      output_format;/*output format*/
	kal_bool auto_restart; /*auto restart*/	
}IMGDMA_IBW1_STRUCT;

typedef struct{	
	kal_uint16 width;    /*image width*/
	kal_uint16 height;   /*image height*/
	IMGDMA_PIXEL_ENGINE_ENUM 	pixel_engine;/*define pixel engine*/	
	kal_bool auto_restart; /*auto restart*/	
	kal_bool int_en;                   /*interrup enable*/  
}IMGDMA_IBW3_STRUCT;                       
 
typedef struct{	
	kal_uint16 width;    /*image width*/
	kal_uint16 height;   /*image height*/
	IMGDMA_PIXEL_ENGINE_ENUM 	pixel_engine;/*define pixel engine*/	
	kal_bool auto_restart; /*auto restart*/	
	kal_bool int_en;                   /*interrup enable*/  
}IMGDMA_IBW4_STRUCT;                       
 

typedef struct{
	kal_uint32 base_addr;	           /*buffer base address*/	
	kal_uint32 pixel_number;           /*pixel numbers*/
	IMGDMA_DATA_TYPE_ENUM data_type;	  /*RGB565 or RGB888 */	
	IMGDMA_DATA_ORDER_ENUM data_order; /*RGB888 or BGR888 */
	kal_bool int_en;                   /*interrup enable*/  
}IMGDMA_IBR1_STRUCT;

typedef struct{		
	kal_bool restart;                         /* 1: automatic reastart while current frame is finished*/
	kal_bool int_en;                          /*interrup enable*/  
	IMGDMA_PIXEL_ENGINE_ENUM 	pixel_engine; /*define pixel engine*/	
	/*overlay frame configuration*/
	kal_bool 	overlay_frame_mode;				/* KAL_TRUE or KAL_FALSE */
	kal_uint32  overlay_frame_buffer_address;	/* bsae address of the overlay frame buffer */	
	kal_uint16  overlay_frame_width;				/* overlay frame width */
	kal_uint16	overlay_frame_height;			/* overlay frame height */	
	kal_uint16  overlay_frame_target_width;   /* overlay frame target width */
	kal_uint16	overlay_frame_target_height;  /* overlay frame target height */	
	kal_uint8	overlay_color_depth;				/* 1/2/4/8 bpp */
	kal_uint8	overlay_frame_source_key;		/* source key of the overlay frame buffer */				
}IMGDMA_IBR2_STRUCT;

typedef struct{			
	kal_uint32	jpeg_file_buffer_address;		/* the start address of JPEG file located */
   kal_uint16 	target_width;						/* the width of target image */
	kal_uint16 	target_height;						/* the height of target image */
	kal_uint16 	fifo_size;						   /* FIFO size */
	IMGDMA_PIXEL_ENGINE_ENUM 	pixel_engine; /*define pixel engine*/	
	kal_uint8	jpeg_yuv_mode;						/* YUV420, YUV422 or Gray mode*/
	kal_bool    restart;                      /* 1: automatic reastart while current frame is finished*/
   		
}IMGDMA_JPEG_DMA_STRUCT;

typedef struct{					
	kal_uint32  y_base_addr1;                     /*Base addr1 Y */
   kal_uint32  y_base_addr2;                     /*Base addr2 Y */
   kal_uint32  u_base_addr1;                     /*Base addr1 U */
   kal_uint32  u_base_addr2;                     /*Base addr2 U */
   kal_uint32  v_base_addr1;                     /*Base addr1 V */
   kal_uint32  v_base_addr2;                     /*Base addr2 V */
   
   kal_uint16  encode_width;                     /*encode width*/  
   kal_uint16  encode_height;                    /*encode height*/
	
	IMGDMA_PIXEL_ENGINE_ENUM 	wdma_pixel_engine;        /*define WDMA pixel engine*/	
	IMGDMA_PIXEL_ENGINE_ENUM 	rdma_destination_engine;  /*define RDMA destination engine*/	
   kal_bool    restart;                      /* 1: automatic reastart while current frame is finished*/
   kal_bool    wrtie_done_int;                     /*write done interrupt*/
   kal_bool    read_done_int;                      /*read done interrupt*/		   		
   kal_bool    w_trigger_r;                      /* 1: automatic reastart while current frame is finished*/		   		
   
}IMGDMA_VIDEO_ENCODE_STRUCT;

typedef struct{					
	kal_uint32  y_base_addr1;                     /*Base addr1 Y */
   kal_uint32  y_base_addr2;                     /*Base addr2 Y */
   kal_uint32  u_base_addr1;                     /*Base addr1 U */
   kal_uint32  u_base_addr2;                     /*Base addr2 U */
   kal_uint32  v_base_addr1;                     /*Base addr1 V */
   kal_uint32  v_base_addr2;                     /*Base addr2 V */
   
   kal_uint16  width;                            /*decode width*/  
   kal_uint16  height;                           /*decode height*/
		   
   kal_bool    decode_done_int;                  /*decode done interrupt*/
      
}IMGDMA_VIDEO_DECODE_STRUCT;

typedef struct{					
	kal_uint32 frame1_base_addr;
	kal_uint32 frame2_base_addr;
	kal_uint16 width;
	kal_uint16 height;
   kal_uint16 pitch1_bytes; // horizontal pitch 1
	kal_uint16 pitch2_bytes; // horizontal pitch 2	
	kal_uint16 clip_left;
	kal_uint16 clip_right;
	kal_uint16 clip_top;
	kal_uint16 clip_bottom;	
	IDMA_Callback cb;
	kal_uint8  dest_color_mode;   
   IMGDMA_PIXEL_ENGINE_ENUM 	pixel_engine;        /*define pixel engine*/	
   kal_bool   lcd_trigger;
   kal_bool   int_en;
   kal_bool   pan;
   kal_bool   direct_couple;
   kal_bool   restart;
   kal_bool   pitch;      
   kal_bool   enable_IBW2;      
}IMGDMA_IBW2_STRUCT;

/*extern functions*/

void IMGDMA_IBW2Config(IMGDMA_IBW2_STRUCT *ibw2_struct);
void IMGDMA_VIDEODECODE_DMAConfig(IMGDMA_VIDEO_DECODE_STRUCT *video_decode_dma_struct);
void IMGDMA_VIDEOENCODE_DMAConfig(IMGDMA_VIDEO_ENCODE_STRUCT *video_encode_dma_struct);
void IMGDMA_JPEGDMAConfig(IMGDMA_JPEG_DMA_STRUCT *jpeg_dma_struct);
void IMGDMA_IBR2Config(IMGDMA_IBR2_STRUCT *ibr2_struct);
void IMGDMA_IBR1Config(IMGDMA_IBR1_STRUCT *ibr1_struct);
void IMGDMA_IBW4Config(IMGDMA_IBW4_STRUCT *ibw4_struct);
void IMGDMA_IBW3Config(IMGDMA_IBW3_STRUCT *ibw3_struct);
void IMGDMA_IBW1Config(IMGDMA_IBW1_STRUCT *ibw1_struct);
void video_enc_reset_buffer_counter(void);

#endif
#endif // IMGDMA_H