msotg.c

MSTAR03的数码相框的代码

       case B_WAIT_ACON:
            usbChange_OTG_State(B_PERIPHERAL);
            usbComplete_Resume();
            break;

       case A_SUSPEND:
            usbActivate_Resume();
            break;
     }

   }

   if  (intrusb & M_INTR_SESSREQ)
   {
     if  (usbCurOTGState == AB_IDLE)
     {
       usbChange_OTG_State(A_WAIT_BCON);
       usbSet_DRC_Devctl(M_DEVCTL_SESSION);
     }
   }
}

void usbChange_OTG_State(__u8 toOTG)
{
   __u32 i;
   //printf("\r\n SOTGS=%x",  toOTG); //artemis printf
   usbRefresh_DRC_Registers();

   if(usbResetting)
     return;
   usbReqOTGState = toOTG;

   if  ((usbExiting_Host(toOTG)) || (AB_MODE(usbCurOTGState) == AB_PERIPHERAL))
     usbExit_Active_USB_Mode();
   #ifdef Artemis_DEBUG
   printf("\r\n SOTGS=%x",  toOTG); //artemis printf
   #endif
   switch(toOTG)
   {
     case AB_IDLE:
		  usbHNPEnabled = 0;
	      usbSessRequest = 0;	 /* no pending requests */
	      usbClear_DRC_Power(0);	 /* clear all pending or residue reqs*/
	      usbClear_DRC_Devctl(0); /* ends session */
	      break;
     case B_SRP_INIT:

	      usbSessRequest = 1;
		  for (i=0; i<(100*TB_SRP_FAIL); i++)
		  {
		    //Delay1MS(10);
            if (usbCurOTGState != B_SRP_INIT)
		      return;
		  }
		  usbB_SRP_Fail();
		  break;
	 case A_WAIT_BCON:
		  for (i=0; i<(100*TS_SESSREQ); i++)
		  {
		    //Delay1MS(10);
            //if (usbCurOTGState != A_WAIT_BCON)
			//	               return;
		  }
		  usbWait_SessReq_Tmout();
		  break;
	 case A_PERIPHERAL:
	 case B_PERIPHERAL:
          if (usbVBus_Status() < VBUS_ABOVE_AVALID)
            usbChange_OTG_State(AB_IDLE);
	      usbRead_DRC_Power();
	      if (usbRegPower & M_POWER_HSMODE)
	        usbSpeed = HIGH_SPEED;
      	  else
	        usbSpeed = FULL_SPEED;
          break;
	 case B_WAIT_ACON:
		  for (i=0; i<20; i++)
		  {
		    //Delay1MS(10);
            if (usbVBus_Status() < VBUS_ABOVE_AVALID)
              usbChange_OTG_State(AB_IDLE);
            if (usbCurOTGState != B_WAIT_ACON)
			  return;
		  }
		  usbB_Aase0_Brst_Tmout();
		  break;
	 case A_HOST:
		  usbHNPEnabled = 0;
	      usbSessRequest = 0;
	      if (usbCurOTGState != A_SUSPEND)
	      {
	        //Delay1MS(1);
            #ifdef Artemis_DEBUG
	        printf("\r\n hosta", 0);
            #endif
			usbHost_Reset_Start();
	      }
		  break;
	 case B_HOST:
		  usbHNPEnabled = 0;
	      usbSessRequest = 0;
		  for (i=0; i<10; i++)
		  {
		    //Delay1MS(10);
            if(usbVBus_Status() < VBUS_ABOVE_AVALID)
              usbChange_OTG_State(AB_IDLE);
            if (usbCurOTGState != B_HOST)
			  return;
		  }
		  usbHost_Reset_Start();
		  break;
     case A_SUSPEND:
		  usbSet_DRC_Power(M_POWER_SUSPENDM);
          if  (usbHNPSupport)
          {
            for (i=0; i<(TA_AIDL_BDIS/10); i++)
		    {
			  //Delay1MS(10);
              if (usbCurOTGState != A_SUSPEND)
			    return;
		    }
		    usbA_Aidl_Bdis_Tmout();
          }
          else
            usbSuspended = 1;
          break;
     default:
          return;
          break;
   }
   if(usbValidate_OTG_Transition())
   {
     //printf("\r\n ck1", 0);
     usbCurOTGState = toOTG;
   }
   else
   {
     for (i=0; i<250; i++)
     {
       //printf("\r\n ck2", 0);
       //Delay1MS(1);
       if(usbValidate_OTG_Transition())
	     usbCurOTGState = toOTG;
     }
     if (!usbValidate_OTG_Transition())
     {
     	 //printf("\r\n ck3", 0);
         //artemis mark at 0803 usbReset_DRC_Core();
     }
   }
   //printf("\r\n T1", 0);
}

void  usbReset_All_EP_IO_Vars(void)
{
   __u8 i;

   for (i=0; i < usbNumEPDefs; i++)
   {
     if  DRCHOST(usbRegDevCtl)
       usbEP[i].IOState = EP_TX;
	 else
       usbEP[i].IOState = EP_IDLE;
     usbEP[i].FifoRemain = 0;
     usbEP[i].BytesRequested = 0;
     usbEP[i].BytesProcessed = 0;
     usbEP[i].LastPacket = 0;
     usbEP[i].Halted = 0;
   }
}

__u8 usbIsPeripheral(void)
{
   if (AB_MODE(usbReqOTGState) == AB_PERIPHERAL)
     return 1;
   else
	 return 0;
}

__u8 usbIsHOST(void)
{
   if (AB_MODE(usbReqOTGState) == AB_HOST)
     return 1;
   else
	 return 0;
}

__s8 usbValidate_OTG_Transition(void)
{
   //printf("\r\n usbRegDevCtl2=%x", usbRegDevCtl);
   if (DRCHOST(usbRegDevCtl))
   {
     if (AB_MODE(usbReqOTGState) == AB_PERIPHERAL)
	   return 0;
   }
   else
   {
	 if (AB_MODE(usbReqOTGState) == AB_HOST)
	   return 0;
   }
   return 1;
}


void usbA_Aidl_Bdis_Tmout(void)
{
   if  (usbResetting)
     return;
   //artemis mark at 0803 usbChange_OTG_State(AB_IDLE);
   //artemis mark at 0803 usbReset_DRC_Core();
}
void usbHost_Reset_Complete(void)
{
   usbClear_DRC_Power(M_POWER_RESET);
   usbChange_USB_State(USB_DEFAULT);

   if (usbRegPower & M_POWER_HSMODE)
     usbSpeed = HIGH_SPEED;
   else
     usbSpeed = FULL_SPEED;
   #ifdef Artemis_DEBUG
   printf("\r\n test",0);
   #endif
   usbResetComplete=1;
   //USB_EP0_Manager();
}
void usbHost_Reset_Start(void)
{
   __u32 i;

   usbSet_DRC_Power(M_POWER_RESET);
   for (i=0; i<40000; i++); //about 100ms delay
   //for(i=0;i<6000;i++); //about 30ms delay
   //for (i=0; i<200000; i++);
   //printf("\r\n Dstar",0);
   //Delay1ms(1);
   //printf("\r\n Dend",0);

   usbHost_Reset_Complete();
}

void usbB_Aase0_Brst_Tmout(void)
{
   if (usbCurOTGState == B_WAIT_ACON)
   {
     usbClear_DRC_Devctl(M_DEVCTL_HR);
	 //artemis mark at 0803usbChange_OTG_State(B_PERIPHERAL);
   }
}

void usbWait_SessReq_Tmout(void)
{
   if (usbResetting)
     return;
   //artemis mark at 0803 usbChange_OTG_State(AB_IDLE);
}

void usbB_SRP_Fail(void)
{
   if ((usbCurOTGState == B_SRP_INIT) || (usbCurOTGState == AB_IDLE))
   {
     //artemis mark at 0803 if (usbVBus_Status() < VBUS_ABOVE_AVALID)
	 //artemis mark at 0803 usbChange_OTG_State(AB_IDLE);
   }
}

__s8 usbExiting_Host(__u8 toOTG)
{
   if  (toOTG == A_SUSPEND)
     return(0);
   else if (toOTG == A_PERIPHERAL)
     return(1);
   else if ((usbCurOTGState == A_HOST) || (usbCurOTGState == B_HOST))
     return(1);
   else
     return(0);
}

void usbExit_Active_USB_Mode(void)
{
   usbChange_USB_State(USB_POWERED);
   usbReset_All_EP_IO_Vars();           /* clean up USB states */
   usbREG_WRITE8(USB_REG_FADDR, 0); /* reset USB address value */
}

void usbComplete_Resume(void)
{
   usbResuming = 0;
   usbSuspended = 0;
}

void usbResume_Timer_Completion(void)
{
   usbClear_DRC_Power(M_POWER_RESUME | M_POWER_SUSPENDM);
   switch(usbCurOTGState)
   {
     case A_SUSPEND:
	      usbChange_OTG_State(A_HOST);
	      break;
   }
   usbComplete_Resume();
}

void usbActivate_Resume(void)
{
   __s32 resume_delay,i;

   if  (usbResuming)
     return;
   usbResuming = 1;
   if(usbCurOTGState == A_SUSPEND)
   {
     usbSet_DRC_Power(M_POWER_RESUME);
     resume_delay = TM_HOST_RESUME;
   }
   else
   {
     resume_delay = TM_PERIPHERAL_RESUME;
     usbSet_DRC_Power(M_POWER_RESUME);
   }
   for (i=0; i<(resume_delay/10); i++)
   {
     //Delay1MS(10);
   }
   usbResume_Timer_Completion();
}