msdma.c

MSTAR03的数码相框的代码

#include "DrvOTGMain.h"
//#include "uart.h"

__s8 free_dma_channels = 127;        /* bit per channel  */

void Control_EP_Interrupt(__s8 ep, __u16 mode);
void Control_EP_InterruptINT(__s8 ep, __u16 mode);

__s8 Get_DMA_Channel(void)
{
   __s8 i, tbit;

   for(i = 0, tbit = 1; i <  MAX_DMA_CHANNEL; i++, tbit <<= 1)
   {
     if(free_dma_channels & tbit)
     {
       free_dma_channels &= ~tbit;
       return i+1;
     }
   }
   return FAILURE;
}

void Release_DMA_Channel(__s8 channel)
{
   free_dma_channels |= (1 << (channel - 1));
}

__s8 usbSet_DMA(__s8 ep, __u16 mode)
{
   __s8 ch;
   __u8 index, csr2;
   __u16 control;
   __u32 count,address;
   //__u16 temp;
   #ifdef Artemis_DEBUG
   printf("\r\n A3",0);
   #endif
   if(NotifyusbConnect==1||NotifyusbConnect2==1||GetPartHeaderTransfer==1)
   {
     free_dma_channels=127;
     //printf("\r\n AAA3=%x",free_dma_channels);
   }

   while(free_dma_channels!=127);/*While Looping_Free:< Impossible to infinite looping>*/
   if((ch = Get_DMA_Channel()) < 0)       /* no free channel */
   {
     #ifdef USB_DEBUG
     //printf("\r\nDMA_CH = %x ",ch);
     #endif
     return FAILURE;
   }

   address = usbEP[ep].transfer_buffer + usbEP[ep].BytesProcessed;
   count = usbEP[ep].BytesRequested - usbEP[ep].BytesProcessed;
   //printf("\r\n Req0=%x", (__u16)usbEP[ep].BytesRequested);
   //printf("\r\n Req1=%x", (__u16)(usbEP[ep].BytesRequested>>16));
   //printf("\r\n Pro0=%x", (__u16)usbEP[ep].BytesProcessed);
   //printf("\r\n Pro1=%x", (__u16)(usbEP[ep].BytesProcessed>>16));
   #if 0
   if(count < MIN_DMA_TRANSFER_BYTES)
   {
     Release_DMA_Channel(ch);
     return FAILURE;
   }
   #else
   if((count < usbEP[ep].MaxEPSize/*MIN_DMA_TRANSFER_BYTES*/)||(!(mode & DMA_TX)&& !usbIsHOST() && !(OtgDeviceType==Device_MassStorage) ))
   {
     Release_DMA_Channel(ch);
     //printf("\r\nD2=%x",count);
     return FAILURE;
   }
   #endif
   #ifdef USB_DEBUG
   //printf("\r\nsetaddress = %x ",address);
   //printf("\r\nSet_count = %x ",count);
   //printf("\r\nSet_mode = %x ",mode);
   #endif
   /* for multiple Bulk packets, set Mode 1 */
   if (count >= usbEP[ep].MaxEPSize)
   {
     mode |= DMA_MODE_ONE;
   }
   else
   {
     if(mode & DMA_TX)
     {
	   count = MIN(usbEP[ep].MaxEPSize, count);
	   //printf("\r\n count=%x ", (__u16)(count>>16));
       //printf("%x", (__u16)(count));
	   //usbBulkInStatus2=0;
	 }
	 else
	   count = MIN(usbEP[ep].FifoRemain, count);
   }

   /* prepare DMA control register */
   if(EPConfig&0x10)
   {
     control = (__u16)DMA_ENABLE_BIT | mode | ((__u16)usbEP[ep].BltEP2 << DMA_ENDPOINT_SHIFT) | ((__u16)DMA_BurstMode<<9);
   }
   else
   {
     control = (__u16)DMA_ENABLE_BIT | mode | ((__u16)usbEP[ep].BltEP << DMA_ENDPOINT_SHIFT) | ((__u16)DMA_BurstMode<<9);
   }
   #ifdef BIG_ENDIAN
   if(GetPartHeaderTransfer==1)
   {
     #ifdef Artemis_DEBUG
     printf("\r\n am1=%x",(__u16)address);
     printf("\r\n am1=%x",(__u16)(address>>16));
     #endif
     pbWriteUSB32Reg((__u16)DMA_ADDR_REGISTER(ch), address);
   }
   else
   {

     #ifdef Artemis_DEBUG5
     printf("\r\n am1=%x",(__u16)address);
	 printf("\r\n am1=%x",(__u16)(address>>16));
     #endif

     address=address & 0xffff;
     pbWriteUSB32Reg((__u16)DMA_ADDR_REGISTER(ch), address+usbXdataSDRAMBaseAddr);
   }
   //#ifdef Artemis_DEBUG6
   //printf("\r\n count=%x",(__u16)(count>>16));
   //printf(" %x",(__u16)count);
   //printf("\r\n ch=%x",ch);
   //#endif
   pbWriteUSB32Reg((__u16)DMA_COUNT_REGISTER(ch), count);
   #ifdef USB_DEBUG
   //printf("\r\nSet_control = %x ",control);
   //printf("\r\nsetcount = %x ",count);
   //printf("\r\nendpoint = %x ",usbEP[ep].BltEP);
   //printf("\r\nDMA_ADDR = %x ",usbREG_READ8((__u16)DMA_ADDR_REGISTER(ch)));
   //printf("\r\nDMA_COUNT = %x ",usbREG_READ8((__u16)DMA_COUNT_REGISTER(ch)));
   #endif
   #else
   if(GetPartHeaderTransfer)
     *(DMA_ADDR_REGISTER(ch)) = address;
   else
     *(DMA_ADDR_REGISTER(ch)) = address+usbXdataSDRAMBaseAddr;
   *(DMA_COUNT_REGISTER(ch)) = count;
   #endif

   /* save and set index register */
   index = usbREG_READ8(USB_REG_INDEX);
   if(EPConfig&0x10)
     usbREG_WRITE8(USB_REG_INDEX, usbEP[ep].BltEP2);
   else
     usbREG_WRITE8(USB_REG_INDEX, usbEP[ep].BltEP);

   /* program DRC registers */
   switch(mode & DMA_MODE_MASK)
   {
     case DMA_RX | DMA_MODE_ZERO:
          #ifdef Artemis_DEBUG
		  printf("\r\n Act RX_DMA2",0);//artemis printf
          #endif
	      csr2 = usbREG_READ8(USB_REG_RXCSR2);
	      Enable_RX_EP_Interrupt(ep);
	      usbREG_WRITE8(USB_REG_RXCSR2, (csr2 & ~RXCSR2_MODE1));
	      break;

     case DMA_TX | DMA_MODE_ZERO:
          Enable_TX_EP_Interrupt(ep);
          csr2 = usbREG_READ8(USB_REG_TXCSR2);
          usbREG_WRITE8(USB_REG_TXCSR2, (csr2 & ~TXCSR2_MODE1));
          break;

     case DMA_RX | DMA_MODE_ONE:
          //#ifdef Artemis_DEBUG
		  //printf("\r\n Act RX_DMA1",0);//artemis printf
		  //printf("\r\n count\n=%lx",count);
          //#endif
          csr2 = usbREG_READ8(USB_REG_RXCSR2);
          #ifdef BIG_ENDIAN
          //pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
          #ifdef USB_DEBUG
          //printf("\r\nSet_index = %x ",usbREG_READ8(USB_REG_INDEX));
          //printf("\r\nSet_control = %x ",usbREG_READ8((__u16)DMA_CNTL_REGISTER(ch)));
          #endif
          #else
          //*(DMA_CNTL_REGISTER(ch)) = control;
          #endif
          //pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
	      Enable_RX_EP_Interrupt(ep);

          if (DRCHOST(usbRegDevCtl))
	      {
            usbREG_WRITE8(USB_REG_RXCSR2,(csr2 | RXCSR2_MODE1 | M_RXCSR2_H_AUTOREQ));
		    pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
	      }
          else
	      {
            usbREG_WRITE8(USB_REG_RXCSR2, (csr2 | RXCSR2_MODE1));
            if(OtgDeviceType==Device_MassStorage)
            {
              //printf("MCTL1=%x\n",pbReadUSB16Reg(USB_REG_DMA_MODE_CTL));
			  pbWriteUSB16Reg(USB_REG_DMA_MODE_CTL, (pbReadUSB16Reg(USB_REG_DMA_MODE_CTL)&M_Mode1_P_Enable));
              //printf("MCTL2=%x\n",pbReadUSB16Reg(USB_REG_DMA_MODE_CTL));
              //printf("speed=%bx\n",usbSpeed);
              if(usbSpeed == HIGH_SPEED)
			    pbWriteUSB16Reg(USB_REG_DMA_MODE_CTL, (pbReadUSB16Reg(USB_REG_DMA_MODE_CTL)|(count/512))); //disable set_ok2rcv[15]&ECO4NAK_en[14],wayne added
              else
                pbWriteUSB16Reg(USB_REG_DMA_MODE_CTL, (pbReadUSB16Reg(USB_REG_DMA_MODE_CTL)|(count/64))); //disable set_ok2rcv[15]&ECO4NAK_en[14],wayne added
              //printf("MCTL3=%x\n",pbReadUSB16Reg(USB_REG_DMA_MODE_CTL));
			  //printf("MCTL4=%x\n",pbReadUSB16Reg(USB_REG_DMA_MODE_CTL));
			  pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
			  usbREG_WRITE8(USB_REG_RXCSR1, 0);//enable RX
			  pbWriteUSB16Reg(USB_REG_DMA_MODE_CTL, (pbReadUSB16Reg(USB_REG_DMA_MODE_CTL)|M_Mode1_P_OK2Rcv)); //enable set_ok2rcv[15]&ECO4NAK_en[14],wayne added
			  pbWriteUSB16Reg(USB_REG_DMA_MODE_CTL, (pbReadUSB16Reg(USB_REG_DMA_MODE_CTL)&(~M_Mode1_P_OK2Rcv))); //enable set_ok2rcv[15]&ECO4NAK_en[14],wayne added
            }
            else
            {
                pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
            }
            //printf("MCTL5=%x\n",pbReadUSB16Reg(USB_REG_DMA_MODE_CTL));

            #ifdef USB_DEBUG
            //printf("\r\nRXCSR2 = %x ",usbREG_READ8(USB_REG_RXCSR2));
            #endif

	      }

          /* restore previous index value */
          //usbREG_WRITE8(USB_REG_INDEX, index);

          return SUCCESS;

     case DMA_TX | DMA_MODE_ONE:
          //#ifdef Artemis_DEBUG
		  //printf("\r\n Act TX_DMA", 0);//artemis printf
          //#endif
          Enable_TX_EP_Interrupt(ep);
          csr2 = usbREG_READ8(USB_REG_TXCSR2);
          usbREG_WRITE8(USB_REG_TXCSR2, (csr2 | TXCSR2_MODE1));
		  break;
          #ifdef USB_DEBUG
          //printf("\r\nTXCSR2 = %x ",usbREG_READ8(USB_REG_TXCSR2));
          #endif
   }

   /* restore previous index value */
   usbREG_WRITE8(USB_REG_INDEX, index);
   #ifdef BIG_ENDIAN
   pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
   #else
   *(DMA_CNTL_REGISTER(ch)) = control;
   #endif
   return SUCCESS;
}
__s8 usbSet_DMAINT(__s8 ep, __u16 mode)
{
   __s8 ch;
   __u8 index, csr2;
   __u16 control;
   __u32 count,address;
   #ifdef Artemis_DEBUG
   printf("\r\n A3",0);
   #endif
   if(NotifyusbConnect==1||NotifyusbConnect2==1||GetPartHeaderTransfer==1)
   {
     free_dma_channels=127;
     //printf("\r\n AAA3=%x",free_dma_channels);
   }

   while(free_dma_channels!=127);/*While Looping_Free:< Impossible to infinite looping>*/
   if((ch = Get_DMA_Channel()) < 0)       /* no free channel */
   {
     #ifdef USB_DEBUG
     //printf("\r\nDMA_CH = %x ",ch);
     #endif
     return FAILURE;
   }

   address = usbEP[ep].transfer_buffer + usbEP[ep].BytesProcessed;
   count = usbEP[ep].BytesRequested - usbEP[ep].BytesProcessed;
   //printf("\r\n Req0=%x", (__u16)usbEP[ep].BytesRequested);
   //printf("\r\n Req1=%x", (__u16)(usbEP[ep].BytesRequested>>16));
   //printf("\r\n Pro0=%x", (__u16)usbEP[ep].BytesProcessed);
   //printf("\r\n Pro1=%x", (__u16)(usbEP[ep].BytesProcessed>>16));
   #if 0
   if(count < MIN_DMA_TRANSFER_BYTES)
   {
     Release_DMA_Channel(ch);
     return FAILURE;
   }
   #else
   if((count < usbEP[ep].MaxEPSize/*MIN_DMA_TRANSFER_BYTES*/)||(!(mode & DMA_TX)&& !usbIsHOST() && !(OtgDeviceType==Device_MassStorage) ))
   {
     Release_DMA_Channel(ch);
     //printf("\r\nD2=%x",count);
     return FAILURE;
   }
   #endif
   #ifdef USB_DEBUG
   //printf("\r\nsetaddress = %x ",address);
   //printf("\r\nSet_count = %x ",count);
   //printf("\r\nSet_mode = %x ",mode);
   #endif
   /* for multiple Bulk packets, set Mode 1 */
   if (count > usbEP[ep].MaxEPSize)
   {
     mode |= DMA_MODE_ONE;
   }
   else
   {
     if(mode & DMA_TX)
     {
       count = MIN(usbEP[ep].MaxEPSize, count);
       //printf("\r\n count=%x ", (__u16)(count>>16));
       //printf("%x", (__u16)(count));
	   //usbBulkInStatus2=0;
	 }
	 else
	   count = MIN(usbEP[ep].FifoRemain, count);
   }

   /* prepare DMA control register */
   if(EPConfig&0x10)
   {
     control = (__u16)DMA_ENABLE_BIT | mode | ((__u16)usbEP[ep].BltEP2 << DMA_ENDPOINT_SHIFT) | ((__u16)DMA_BurstMode<<9);
   }
   else
   {
     control = (__u16)DMA_ENABLE_BIT | mode | ((__u16)usbEP[ep].BltEP << DMA_ENDPOINT_SHIFT) | ((__u16)DMA_BurstMode<<9);
   }
   #ifdef BIG_ENDIAN
   if(GetPartHeaderTransfer==1)
   {
     #ifdef Artemis_DEBUG
     printf("\r\n am1=%x",(__u16)address);
     printf("\r\n am1=%x",(__u16)(address>>16));
     #endif
     pbWriteUSB32RegINT((__u16)DMA_ADDR_REGISTER(ch), address);
   }
   else
   {

     #ifdef Artemis_DEBUG5
     printf("\r\n am1=%x",(__u16)address);
	 printf("\r\n am1=%x",(__u16)(address>>16));
     #endif

     address=address & 0xffff;
     pbWriteUSB32RegINT((__u16)DMA_ADDR_REGISTER(ch), address+usbXdataSDRAMBaseAddr);
   }
   #ifdef Artemis_DEBUG6
   //printf("\r\n count=%x",(__u16)(count>>16));
   //printf(" %x",(__u16)count);
   //printf("\r\n ch=%x",ch);
   #endif
   pbWriteUSB32RegINT((__u16)DMA_COUNT_REGISTER(ch), count);
   #ifdef USB_DEBUG
   //printf("\r\nSet_control = %x ",control);
   //printf("\r\nsetcount = %x ",count);
   //printf("\r\nendpoint = %x ",usbEP[ep].BltEP);
   //printf("\r\nDMA_ADDR = %x ",usbREG_READ8((__u16)DMA_ADDR_REGISTER(ch)));
   //printf("\r\nDMA_COUNT = %x ",usbREG_READ8((__u16)DMA_COUNT_REGISTER(ch)));
   #endif
   #else
   if(GetPartHeaderTransfer)
     *(DMA_ADDR_REGISTER(ch)) = address;
   else
     *(DMA_ADDR_REGISTER(ch)) = address+usbXdataSDRAMBaseAddr;
     *(DMA_COUNT_REGISTER(ch)) = count;
   #endif

   /* save and set index register */
   index = usbREG_READ8(USB_REG_INDEX);
   if(EPConfig&0x10)
     usbREG_WRITE8(USB_REG_INDEX, usbEP[ep].BltEP2);
   else
     usbREG_WRITE8(USB_REG_INDEX, usbEP[ep].BltEP);

   /* program DRC registers */
   switch(mode & DMA_MODE_MASK)
   {
     case DMA_RX | DMA_MODE_ZERO:
          #ifdef Artemis_DEBUG
		  printf("\r\n Act RX_DMA2",0);//artemis printf
          #endif
	      csr2 = usbREG_READ8(USB_REG_RXCSR2);
	      Enable_RX_EP_InterruptINT(ep);
	      usbREG_WRITE8(USB_REG_RXCSR2, (csr2 & ~RXCSR2_MODE1));
	      break;

     case DMA_TX | DMA_MODE_ZERO:
          Enable_TX_EP_InterruptINT(ep);
          csr2 = usbREG_READ8(USB_REG_TXCSR2);
          usbREG_WRITE8(USB_REG_TXCSR2, (csr2 & ~TXCSR2_MODE1));
          break;

     case DMA_RX | DMA_MODE_ONE:
          #ifdef Artemis_DEBUG
		  printf("\r\n Act RX_DMA1",0);//artemis printf
		  printf("\r\n count=%lx",count);
          #endif
          csr2 = usbREG_READ8(USB_REG_RXCSR2);
          #ifdef BIG_ENDIAN
          //pbWriteUSB16Reg((__u16)(DMA_CNTL_REGISTER(ch)), control);
          #ifdef USB_DEBUG
          //printf("\r\nSet_index = %x ",usbREG_READ8(USB_REG_INDEX));
          //printf("\r\nSet_control = %x ",usbREG_READ8((__u16)DMA_CNTL_REGISTER(ch)));
          #endif
          #else
          //*(DMA_CNTL_REGISTER(ch)) = control;
          #endif
          pbWriteUSB16RegINT((__u16)(DMA_CNTL_REGISTER(ch)), control);
	      Enable_RX_EP_InterruptINT(ep);