colibri_reg.h

完整的基于Conxant平台的USB电视棒的WIN驱动程序。

/*+++ *******************************************************************\
*
*  Colibri_reg.h
*
*  Copyright and Disclaimer:
*
*     ---------------------------------------------------------------
*     This software is provided "AS IS" without warranty of any kind,
*     either expressed or implied, including but not limited to the
*     implied warranties of noninfringement, merchantability and/or
*     fitness for a particular purpose.
*     ---------------------------------------------------------------
*
*     Copyright (c) 2008 Conexant Systems, Inc.
*     All rights reserved.
*
*  Register definitions for the Colibri portion of Polaris
*
\******************************************************************* ---*/

#ifndef __COLIBRI_REG__
#define __COLIBRI_REG__

#define SUP_BLK_TUNE1           0x00
#define SUP_BLK_TUNE2           0x01
#define SUP_BLK_TUNE3           0x02
#define SUP_BLK_XTAL            0x03 
#define SUP_BLK_PLL1            0x04
#define SUP_BLK_PLL2            0x05
#define SUP_BLK_PLL3            0x06 
#define SUP_BLK_REF             0x07
#define SUP_BLK_PWRDN           0x08
#define SUP_BLK_TESTPAD         0x09 
#define ADC_COM_INT5_STAB_REF   0x0a 
#define ADC_COM_QUANT           0x0b
#define ADC_COM_BIAS1           0x0c 
#define ADC_COM_BIAS2           0x0d 
#define ADC_COM_BIAS3           0x0e 
#define TESTBUS_CTRL            0x12 

#define ADC_STATUS_CH1          0x20
#define ADC_STATUS_CH2          0x40 
#define ADC_STATUS_CH3          0x60 

#define ADC_STATUS2_CH1         0x21
#define ADC_STATUS2_CH2         0x41
#define ADC_STATUS2_CH3         0x61

#define ADC_CAL_ATEST_CH1       0x22
#define ADC_CAL_ATEST_CH2       0x42
#define ADC_CAL_ATEST_CH3       0x62

#define ADC_PWRDN_CLAMP_CH1     0x23
#define ADC_PWRDN_CLAMP_CH2     0x43
#define ADC_PWRDN_CLAMP_CH3     0x63

#define ADC_CTRL_DAC23_CH1      0x24
#define ADC_CTRL_DAC23_CH2      0x44
#define ADC_CTRL_DAC23_CH3      0x64

#define ADC_CTRL_DAC1_CH1       0x25
#define ADC_CTRL_DAC1_CH2       0x45
#define ADC_CTRL_DAC1_CH3       0x65

#define ADC_DCSERVO_DEM_CH1     0x26
#define ADC_DCSERVO_DEM_CH2     0x46
#define ADC_DCSERVO_DEM_CH3     0x66

#define ADC_FB_FRCRST_CH1       0x27
#define ADC_FB_FRCRST_CH2       0x47
#define ADC_FB_FRCRST_CH3       0x67

#define ADC_INPUT_CH1           0x28
#define ADC_INPUT_CH2           0x48
#define ADC_INPUT_CH3           0x68
#define INPUT_SEL_MASK          0x30    //[5:4] in_sel

#define ADC_NTF_PRECLMP_EN_CH1  0x29
#define ADC_NTF_PRECLMP_EN_CH2  0x49
#define ADC_NTF_PRECLMP_EN_CH3  0x69

#define ADC_QGAIN_RES_TRM_CH1   0x2a 
#define ADC_QGAIN_RES_TRM_CH2   0x4a 
#define ADC_QGAIN_RES_TRM_CH3   0x6a 

#define ADC_SOC_PRECLMP_TERM_CH1    0x2b 
#define ADC_SOC_PRECLMP_TERM_CH2    0x4b 
#define ADC_SOC_PRECLMP_TERM_CH3    0x6b 

#define TESTBUS_CTRL_CH1        0x32 
#define TESTBUS_CTRL_CH2        0x52
#define TESTBUS_CTRL_CH3        0x72

#endif