📄 if101_operation.h
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/* * IF101 Operations Definition Header * * The API define the available function call for customer IF101 driver * * Innofidei Inc. * * By: Mason Chen <masonchen@innofidei.com> * * Release: * Version 0.1 : 20080106 * Version 0.2 : 20080123 * */#ifndef IF101_OPERATION_H#define IF101_OPERATION_H/********************************************************************************************************** * I2C Address:**********************************************************************************************************/#define I2C_COMMUNICATION_PAGE 0x2#define I2C_CMD_DATA_ADDR 0x98#define I2C_CMD_STATUS_ADDR 0x99#define I2C_RSP_DATA_ADDR 0x9A#define I2C_RSP_STATUS_ADDR 0x9B/********************************************************************************************************** * I2C CMD and RSP status bit**********************************************************************************************************/#define CMD_CODE 0x84#define CMD_PAYLOAD 0x80#define RSP_DATA_VALID 0x80#define CMD_BUSY 0x80/*********************************************************************************************************** I2C CMD Type**********************************************************************************************************/#define CMD_GET_CHANNEL_CONFIG 0x1#define CMD_SET_PM 0x2#define CMD_SET_AGC 0x3#define CMD_GET_FW_VER 0x4#define CMD_SET_CHANNEL_CONFIG 0x5#define CMD_SET_FREQUENCY 0x6#define CMD_SCAN_FREQUENCY 0x9#define CMD_GET_SYS_STATUS 0xA#define CMD_UPDATE_FW 0x81/*********************************************************************************************************** SPI CMD Type**********************************************************************************************************/#define READ_MODE_SEL 0x01#define READ_MODE_CONFIG 0x02#define READ_DEMOD_STATUS 0x03#define READ_INT0_ENABLE 0x04#define READ_INT1_ENABLE 0x05#define READ_INT2_ENABLE 0x06#define WRITE_INT0_ENABLE 0x07#define WRITE_INT1_ENABLE 0x08#define WRITE_INT2_ENABLE 0x09#define READ_INT0_STATUS 0x0A#define READ_INT1_STATUS 0x0B#define READ_INT2_STATUS 0x0C#define READ_INT_ENABLE READ_INT0_ENABLE #define WRITE_INT_ENABLE WRITE_INT0_ENABLE#define READ_INT_STATUS READ_INT0_STATUS#define READ_LG0_FILTER_PID_L 0x0D#define WRITE_LG0_FILTER_PID_L 0x0E#define READ_LG0_FILTER_PID_H 0x0F#define WRITE_LG0_FILTER_PID_H 0x10#define READ_LG1_FILTER_PID_L 0x11#define WRITE_LG1_FILTER_PID_L 0x12#define READ_LG1_FILTER_PID_H 0x13#define WRITE_LG1_FILTER_PID_H 0x14#define READ_LG0_LEN_LOW 0x15#define READ_LG0_LEN_MID 0x16#define READ_LG0_LEN_HIGH 0x17#define READ_LG1_LEN_LOW 0x18#define READ_LG1_LEN_MID 0x19#define READ_LG1_LEN_HIGH 0x1A#define READ_TS0_LEN_LOW 0x1B#define READ_TS0_LEN_MID 0x1C#define READ_TS0_LEN_HIGH 0x1D#define FETCH_LG0_DATA 0x99#define FETCH_LG1_DATA 0x9B#define FETCH_TS0_DATA 0x9D#define PREPARE_TS0_DATA 0x1E#define PREPARE_TS1_DATA 0x1F#define TX_ABORT 0x40 /* master break off transmitting */// INT0_STATUS Bit Mask#define LG0_DATA_RDY (0x01)#define LG1_DATA_RDY (0x02)#define TS0_DATA_RDY (0x04)#define LG0_ERR (0x1u<<3)#define LG1_ERR (0x1u<<4)#define TS0_ERR (0x1u<<5)/* ********************************************************************************************************** * Frequency Table: ************************************************************************************************************/static const unsigned int FREQ_TABLE[70] = {0, 52500, 60500, 68500, 80000, 88000, 171000, 179000, 187000, 195000, 203000, //0-10211000, 219000, 474000, 482000, 491000, 498000, 506000, 514000, 522000, 530000, //11-20538000, 546000, 554000, 562000, 610000, 618000, 626000, 634000, 642000, 650000, //21-30658000, 666000, 674000, 682000, 690000, 698000, 706000, 714000, 722000, 730000, //31-40738000, 746000, 754000, 762000, 770000, 778000, 786000, 794000, 802000, 810000, //41-50818000, 826000, 834000, 842000, 850000, 858000, 866000, 874000, 0, 882000, //51-60890000, 898000, 906000, 914000, 922000, 930000, 938000, 946000 //61-70};/************************* Structure Definition ****************************/typedef enum{ INNO_NO_ERROR = 0, INNO_GENERAL_ERROR = 1, INNO_TIMEOUT_ERROR = 2, INNO_FW_OPERATION_ERROR = 3, INNO_PARAMETER_ERROR = 4,}INNO_RETURN_CODE;typedef enum{ LG0_CHANNEL = 0, LG1_CHANNEL = 1,// TS0_CHANNEL = 2}CHANNEL_NUM;typedef enum{ PM_MODE_PAUSE = 0x80, PM_MODE_RESUME = 0x40,}PM_MODE;typedef enum{ DEMAP_BPSK = 0, DEMAP_QPSK = 1, DEMAP_16QAM = 2,}MODULATE_TYPE;typedef enum{ RS_240_240 = 0, // RS(240,240) RS_240_224 = 1, // RS(240,224) RS_240_192 = 2, // RS(240,192) RS_240_176 = 3 // RS(240,176)}RS_MODE;typedef enum{ OUTER_RERSERVE= 0, OUTER_MODE_1 = 1, OUTER_MODE_2 = 2, OUTER_MODE_3 = 3}OUTER_MODE;typedef enum{ LDPC_1_DIV_2 = 0, LDPC_3_DIV_4 = 1,}LDPC_MODE;typedef enum{ CP_40TS = 0, CP_36TS = 1,}CP_TYPE;typedef struct{ int ts_start; int ts_count; MODULATE_TYPE modulate_type:2; RS_MODE rs_mode:2; OUTER_MODE outer_mode:2; LDPC_MODE ldpc_mode:2;}DEMOD_CONFIG;typedef struct{ int lock; // lock==1 means the frequency has been locked. unsigned int current_frequency; // current Tuner working frequency int signal_strength; // signal strength int ldpc_err_percent; // LDPC error percentage int cp_type; // cp type int scan_process; // scan process. if == 1 means if101 is scaning int scan_result; // scan result. if == 1 means scan successufully }SYS_STATUS;/************************* Function Definition ****************************//* * Test SPI communication * * Parameter: * void * * Example: * If SPI test pass, this API will return INNO_NO_ERROR * */INNO_RETURN_CODE INNO_SPI_Test(void);/* * Get channel length separately to decide which channel should be read how much bytes by SPI * * Parameter: * lg0_channel_length <out> : logical channel 0 length * lg1_channel_length <out> : logical channel 1 length * */INNO_RETURN_CODE INNO_GetChannelLength(unsigned int *lg0_channel_length, unsigned int *lg1_channel_length); /* * Get Data from SPI bus * * Parameter: * channel_num <in> : which channel should be read. 0:lg0_channel, 1:lg1_channel, 2:ts0_channel * buffer <in> : buffer to store data * channel_length <in> : how many bytes should be read from SPI * */INNO_RETURN_CODE INNO_GetChannelData(CHANNEL_NUM channel_num,unsigned char *buffer, int channel_length);/* * Test I2C communication * * Parameter: * void * * Example: * If I2C test pass, this API will return INNO_NO_ERROR * */INNO_RETURN_CODE INNO_I2C_Test(void);/* * Get Firmware Version * * Parameter: * major_version <out> : major version * minor_version <out> : minor version * */INNO_RETURN_CODE INNO_GetFirmwareVersion(unsigned char *major_version, unsigned char *minor_version);/* * Set Tuner Frequency * * Parameter: * freq_dot <in> : the Tuner freq dot. * cp_type <in> : CP type * * Example: * INNO_SetTunerFrequency(20, CP_40TS); //Set to 20 frequency dot. meaning 530000KHZ * INNO_SetTunerFreqency(43, CP_40TS); //Set to 43 frequency dot. meaning 754000KHZ * */INNO_RETURN_CODE INNO_SetTunerFrequency(unsigned char freq_dot, CP_TYPE cp_type);/* * Scan Tuner Frequency * * Parameter: * freq_start <in> : The frequency dot begin to scan. * freq_end <in> : The frequency dot at which stop scaning. * * Example: * INNO_ScanFrequency(20,43); //Scan valid frequency for CMMB from 20~43 (530000KHZ ~ 754000KHZ) * * NOTE: * User can poll sys_status.scan_result by calling INNO_GetSystemStatus(SYS_STATUS *sys_status) to know whether scaning is successfully or not. * */INNO_RETURN_CODE INNO_ScanFrequency(unsigned char freq_start, unsigned char freq_end);/* * Set Power Management * * Parameter: * PM_MODE <in> : PM mode * * Example: * INNO_SetPowerManagement(PM_MODE_PAUSE); //Make IF101 and Tuner sleep * INNO_SetPowerManagement(PM_MODE_RESUME); //Wake up IF101 and Tuner * */INNO_RETURN_CODE INNO_SetPowerManagement(PM_MODE pm);/* * Set IF101 to receive TS0 * * Parameter: * void * * NOTE: * Set channel 0 (neither TS0 channel nor channel 1) to receive TS0 * This API is a sub-API of INNO_SetDemodConfig(). * When receiving TS0, default the demod setting to BPSK, RS_240_240, OUTER_MODE_1, LDPC_1_DIV_2 * */INNO_RETURN_CODE INNO_SetReceiveTs0(void);/* * Set IF101 to receive program(ESG or video program or audio program) * * Parameter: * channel_0_ts_start <in> : * channel_0_ts_count <in> : * channel_1_ts_start <in> : * channel_1_ts_count <in> : * * EXAMPLE: * //Set channel 0 receive 1,2 Timeslot data, and channel 1 receive 7,8,9,10 Timeslot data * INNO_SetReceiveProgram(1,2,7,4); * * NOTE: * This API is a sub-API of INNO_SetDemodConfig(). * When receiving program, default the demod setting to QPSK, RS_240_224, OUTER_MODE_1, LDPC_1_DIV_2 * */INNO_RETURN_CODE INNO_SetReceiveProgram(int channel_0_ts_start,int channel_0_ts_count,int channel_1_ts_start, int channel_1_ts_count);/* * Get IF101 System Status * * Parameter: * sys_status <out> **/INNO_RETURN_CODE INNO_GetSystemStatus(SYS_STATUS *sys_status);/* * Set INNO Demodulate Configuration * * Parameter: * demod_config <in> * ts_start : the start num of TS * ts_count : the count of TS. if ts_count == 0, the channel will close * modulate_type : modulate type * rs_mode : RS mode * outer_mode : OUTER mode * ldpc_mode : LDPC mode * * Example: * * // Set Lg0 channel to receive 3,4,5,6 Timeslot with demod parameter QPSK, RS(240,224),72*240,1/2 LDPC * DEMOD_CONFIG demod_config[2]; * demod_config[0].ts_start = 3; * demod_config[0].ts_count = 4; * demod_config[0].modulate_type = DEMAP_QPSK; * demod_config[0].rs_mode = RS_240_224 ; * demod_config[0].outer_mode = OUTER_MODE_1; * demod_config[0].ldpc_mode = LDPC_1_DIV_2; * * demod_config[1].ts_start = 0; * demod_config[1].ts_count = 0; * demod_config[1].demap_mode = 0; * demod_config[1].rs_mode = 0; * demod_config[1].outer_mode = 0; * * INNO_SetDemodConfig(demod_config); * */INNO_RETURN_CODE INNO_SetDemodConfig(DEMOD_CONFIG demod_config[2]);/* * Get IF101 Demodulate Configuration * * Parameter: * demod_config <out> * */INNO_RETURN_CODE INNO_GetDemodConfig(DEMOD_CONFIG demod_config[2]);#endif
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