dds_vhdl.tan.rpt

dds移相信号发生器 VHDL语言代码

; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg7 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[4] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg8 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[4] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg9 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[4] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg0 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg1 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg2 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg3 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg4 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg5 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg6 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg7 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg8 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg9 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[7] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg0 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg1 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg2 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg3 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg4 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg5 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg6 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg7 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg8 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg9 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[6] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg0 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg1 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg2 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg3 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg4 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg5 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg6 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg7 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg8 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a4~porta_address_reg9 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[5] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg0 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg1 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg2 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg3 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg4 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg5 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg6 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg7 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg8 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg9 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[8] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg0 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[9] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg1 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[9] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;
; N/A                                     ; 256.02 MHz ( period = 3.906 ns )                    ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|ram_block1a8~porta_address_reg2 ; sin_rom:u3|altsyncram:altsyncram_component|altsyncram_u631:auto_generated|q_a[9] ; CLK        ; CLK      ; None                        ; None                      ; 3.323 ns                ;