dds_vhdl.map.summary

来自「dds移相信号发生器 VHDL语言代码」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Sun Aug 10 19:36:10 2008
Quartus II Version : 7.1 Build 156 04/30/2007 SJ Full Version
Revision Name : DDS_VHDL
Top-level Entity Name : DDS_VHDL
Family : Cyclone
Total logic elements : 22
Total pins : 37
Total virtual pins : 0
Total memory bits : 20,480
Total PLLs : 0