📄 s1o.mdl
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Name "in_1"
Position [15, 25, 35, 45]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_2"
Position [15, 90, 35, 110]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Product
Name "Product"
Position [65, 55, 90, 75]
Inputs "2"
}
Block {
BlockType Sum
Name "Sum"
Position [125, 55, 145, 75]
Inputs "+"
}
Block {
BlockType Outport
Name "out_1"
Position [185, 55, 205, 75]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "in_2"
SrcPort 1
DstBlock "Product"
DstPort 2
}
Line {
SrcBlock "in_1"
SrcPort 1
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "out_1"
DstPort 1
}
}
}
Block {
BlockType SubSystem
Name "Inner\nProduct1"
Position [170, 125, 195, 160]
ShowPortLabels off
MaskType "Dot Product"
MaskDescription "Inner (dot) product.\ny=sum(u1.*u2)"
MaskHelp "Computes the inner (dot) product of the "
"inputs: sum(u1.*u2). The inputs are "
"vectors of the same length. Output is "
"a scalar."
MaskDisplay "disp('.\\n')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate off
MaskIconUnits autoscale
System {
Name "Inner\nProduct1"
Location [33, 479, 253, 634]
Open off
ScreenColor white
Block {
BlockType Inport
Name "in_1"
Position [15, 25, 35, 45]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "in_2"
Position [15, 90, 35, 110]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Product
Name "Product"
Position [65, 55, 90, 75]
Inputs "2"
}
Block {
BlockType Sum
Name "Sum"
Position [125, 55, 145, 75]
Inputs "+"
}
Block {
BlockType Outport
Name "out_1"
Position [185, 55, 205, 75]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "in_2"
SrcPort 1
DstBlock "Product"
DstPort 2
}
Line {
SrcBlock "in_1"
SrcPort 1
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "out_1"
DstPort 1
}
}
}
Block {
BlockType Mux
Name "Mux"
Position [355, 42, 380, 248]
Inputs "3"
}
Block {
BlockType Constant
Name "Vb"
Position [275, 59, 305, 91]
Value "Vb"
}
Block {
BlockType Integrator
Name "cos"
Position [235, 125, 270, 165]
ExternalReset none
InitialConditionSource internal
InitialCondition "1"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Integrator
Name "sin"
Position [245, 236, 280, 274]
ExternalReset none
InitialConditionSource internal
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Constant
Name "we"
Position [65, 118, 90, 152]
Value "we"
}
Block {
BlockType Outport
Name "vag"
Position [630, 75, 650, 95]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vbg"
Position [630, 135, 650, 155]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vcg"
Position [630, 195, 650, 215]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "we"
SrcPort 1
Points [0, 0]
Branch {
DstBlock "Inner\nProduct1"
DstPort 1
}
Branch {
Points [25, 0]
DstBlock "Inner\nProduct"
DstPort 1
}
}
Line {
SrcBlock "-1"
SrcPort 1
DstBlock "sin"
DstPort 1
}
Line {
SrcBlock "Inner\nProduct"
SrcPort 1
DstBlock "-1"
DstPort 1
}
Line {
SrcBlock "Inner\nProduct1"
SrcPort 1
DstBlock "cos"
DstPort 1
}
Line {
SrcBlock "cos"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, -40; -175, 0; 0, 155]
DstBlock "Inner\nProduct"
DstPort 2
}
Branch {
DstBlock "Mux"
DstPort 2
}
}
Line {
SrcBlock "sin"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, -40; -140, 0]
DstBlock "Inner\nProduct1"
DstPort 2
}
Branch {
Points [10, 0; 0, -40]
DstBlock "Mux"
DstPort 3
}
}
Line {
SrcBlock "Fcn"
SrcPort 1
DstBlock "vag"
DstPort 1
}
Line {
SrcBlock "Fcn1"
SrcPort 1
DstBlock "vbg"
DstPort 1
}
Line {
SrcBlock "Fcn2"
SrcPort 1
DstBlock "vcg"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, -60]
DstBlock "Fcn"
DstPort 1
}
Branch {
DstBlock "Fcn1"
DstPort 1
}
Branch {
Points [10, 0; 0, 60]
DstBlock "Fcn2"
DstPort 1
}
}
Line {
SrcBlock "Vb"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Annotation {
Position [202, 307]
VerticalAlignment top
Text "variable frequency oscillator"
}
Annotation {
Position [327, 57]
VerticalAlignment top
Text "Vpk"
}
Annotation {
Position [512, 307]
VerticalAlignment top
Text "2-phase to 3-phase "
}
Annotation {
Position [302, 193]
VerticalAlignment top
Text "-sin_wet"
}
Annotation {
Position [317, 121]
VerticalAlignment top
Text "cos_wet"
}
}
}
Block {
BlockType SubSystem
Name "Zero_seq"
Position [400, 338, 430, 382]
ShowPortLabels off
System {
Name "Zero_seq"
Location [160, 675, 612, 861]
Open on
ScreenColor white
Block {
BlockType Inport
Name "v0s"
Position [55, 60, 75, 80]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Integrator
Name "Integrator"
Position [265, 65, 295, 95]
ExternalReset none
InitialConditionSource internal
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Sum
Name "Sum"
Position [140, 60, 165, 100]
Inputs "+-"
}
Block {
BlockType Gain
Name "rs"
Position [200, 122, 245, 158]
Orientation left
Gain "rs"
}
Block {
BlockType Gain
Name "wb/xls"
Position [200, 64, 240, 96]
Gain "wb/xls"
}
Block {
BlockType Outport
Name "i0s"
Position [365, 70, 385, 90]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "rs"
SrcPort 1
Points [-80, 0; 0, -50]
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "wb/xls"
DstPort 1
}
Line {
SrcBlock "wb/xls"
SrcPort 1
DstBlock "Integrator"
DstPort 1
}
Line {
SrcBlock "v0s"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [0, 0]
Branch {
Points [10, 0; 0, 60]
DstBlock "rs"
DstPort 1
}
Branch {
DstBlock "i0s"
DstPort 1
}
}
Annotation {
Position [227, 27]
VerticalAlignment top
Text "Stator's zero-sequence circuit"
}
}
}
Block {
BlockType SubSystem
Name "abc2qds"
Position [145, 186, 190, 289]
ShowPortLabels off
System {
Name "abc2qds"
Location [91, 117, 775, 501]
Open off
ScreenColor white
Block {
BlockType Inport
Name "vag"
Position [40, 100, 60, 120]
Port "1"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "vbg"
Position [40, 160, 60, 180]
Port "2"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "vcg"
Position [40, 220, 60, 240]
Port "3"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Inport
Name "ias+ibs+ics"
Position [40, 285, 60, 305]
Port "4"
PortWidth "-1"
SampleTime "-1"
}
Block {
BlockType Gain
Name "1/Csg"
Position [150, 274, 230, 316]
Gain "50*Zb*wb"
}
Block {
BlockType Fcn
Name "Fcn"
Position [210, 86, 375, 124]
Expr "(2/3)*(u[1] - (u[2]+u[3])/2)"
}
Block {
BlockType Fcn
Name "Fcn1"
Position [210, 150, 375, 190]
Expr "(u[3]-u[2])/sqrt(3)"
}
Block {
BlockType Fcn
Name "Fcn2"
Position [210, 215, 375, 255]
Expr "(u[1]+u[2]+u[3])/3"
}
Block {
BlockType Integrator
Name "Integrator"
Position [345, 280, 375, 310]
ExternalReset none
InitialConditionSource internal
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Mux
Name "Mux"
Position [105, 81, 145, 259]
Inputs "3"
}
Block {
BlockType Sum
Name "Sum"
Position [465, 223, 480, 267]
Inputs "+-"
}
Block {
BlockType Sum
Name "Sum1"
Position [465, 93, 480, 137]
Inputs "+-"
}
Block {
BlockType Outport
Name "vqs"
Position [515, 105, 535, 125]
Port "1"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "vds"
Position [515, 160, 535, 180]
Port "2"
OutputWhenDisabled held
InitialOutput "0"
}
Block {
BlockType Outport
Name "v0s"
Position [515, 235, 535, 255]
Port "3"
OutputWhenDisabled held
InitialOutput "0"
}
Line {
SrcBlock "ias+ibs+ics"
SrcPort 1
DstBlock "1/Csg"
DstPort 1
}
Line {
SrcBlock "vag"
SrcPort 1
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "vbg"
SrcPort 1
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