address_map_80.h

2.4G无线音箱的接收程序,采用ATMEGA8单片机和STS公司的无线模块完成

/******************************************************************************
*
* Purpose:      Address map definitions
*
* Creator:      Rob Lansbergen
*
* Version:		$Revision: 6 $
*
* File Name:	$Workfile: Address_Map_80.h $
*
* Author:		Rob Lansbergen
*
* Check in:		$Author: Chong.cheeleong $
*
* $History: Address_Map_80.h $ *
 * 
 * *****************  Version 6  *****************
 * User: Chong.cheeleong Date: 1/22/08    Time: 5:03p
 * Updated in $/5740 DARR 80/Implementation/MCU/Application Software
 * 
 * *****************  Version 5  *****************
 * User: Paul         Date: 23-05-07   Time: 11:58
 * Updated in $/5740 DARR 80/MCU/Application Software
 * Func_NACK added
 * 
 * *****************  Version 4  *****************
 * User: Paul         Date: 30-03-07   Time: 14:11
 * Updated in $/5740 DARR 80/MCU/Application Software
 * STS1=47 and STS2=48 added
 * 
 * *****************  Version 3  *****************
 * User: Paul         Date: 19-03-07   Time: 13:38
 * Updated in $/5740 DARR 80/MCU/Application Software
 * Appl config redesign and cleanup register loading
 * 
 * *****************  Version 2  *****************
 * User: Paul         Date: 8-03-07    Time: 16:39
 * Updated in $/5740 DARR 80/MCU/Application Software
 * CleanUp renaming files, includes, externals 2006 >> 2007
 * 
 * *****************  Version 1  *****************
 * User: Paul         Date: 8-03-07    Time: 9:05
 * Created in $/5740 DARR 80/MCU/Application Software
 * 
 * *****************  Version 4  *****************
 * User: Rob          Date: 2/22/07    Time: 12:09p
 * Updated in $/5740 DARR 80/MCU/Application Software
 * 
 * *****************  Version 3  *****************
 * User: Rob          Date: 2/15/07    Time: 1:57p
 * Updated in $/5740 DARR 80/MCU/Application Software
 * 
 * *****************  Version 2  *****************
 * User: Paul         Date: 21-12-06   Time: 14:19
 * Updated in $/5740 DARR 80/MCU_MERGE/Application Software
 * Testing application software on DARR80 Virtex
*
* Copyright (C) 2007 STS, WSS bv
*
******************************************************************************/
#ifndef Adddress_Map_H
#define Adddress_Map_H

#define MAX_CONFIG_DEPTH            256    /* Maximum of byte's in config string */
#define MAX_SETTINGS_DEPTH          25     /* Total bytes in Application settings */

/******************* Address map MAX II	`*****************/
#define ENKY_ADDR 0
#define  GEC_ADDR 16
#define  VER_ADDR 17
#define INTF_ADDR 19
#define INTM_ADDR 20
#define CEID_ADDR 21
#define PDDC_ADDR 22
#define MODE_ADDR 23

#define  PDC_ADDR 24
#define  RFC_ADDR 25
#define M28C_ADDR 26
 
#define FMSK_ADDR 27
//#define S24C_ADDR 28 /* obsolete */
 
#define AICS_ADDR 31
#define AIC2_ADDR 32
#define STAC_ADDR 33
#define PIAC_ADDR 34
#define RS2P_ADDR 35
#define TP2S_ADDR 36
#define AVOW_ADDR 37
#define AVOX_ADDR 38
#define AVOY_ADDR 39
#define AVOZ_ADDR 40
#define UNCP_ADDR 41
#define SCS1_ADDR 42
#define SCS2_ADDR 43
#define AMIL_ADDR 44
#define AMAP_ADDR 45
#define AMAL_ADDR 46
#define STS1_ADDR 47
#define STS2_ADDR 48
 
#define STLC_ADDR 50
#define COCO_ADDR 51
#define IMSL_ADDR 53
#define IMMA_ADDR 54
#define IMWC_ADDR 55
#define IMDA_ADDR 56
#define GPIO_ADDR 57
#define  GPC_ADDR 58
 
#define  TDC_ADDR 64
#define  RDC_ADDR 65
#define MUAD_ADDR 66
#define MDLA_ADDR 69
#define DMUA_ADDR 70
#define SMUA_ADDR 70
#define DBUF_ADDR 80
 
#define QSLO_ADDR 100
#define SNCD_ADDR 116
#define SNCU_ADDR 117
#define AGCD_ADDR 118
#define AGCU_ADDR 119
#define QUIN_ADDR 120
#define DTSL_ADDR 121
#define DTSH_ADDR 122
#define ATSI_ADDR 123
#define ATSQ_ADDR 124
#define RMTS_ADDR 125
#define PINT_ADDR 126
#define  SPE_ADDR 127
 
#define  ASC_ADDR 128
#define ASTH_ADDR 129
#define SPD1_ADDR 129
#define SIN1_ADDR 130
#define ASID_ADDR 130
#define STR1_ADDR 132
#define SPD2_ADDR 134
#define SIN2_ADDR 135
#define STR2_ADDR 137
#define SPD3_ADDR 139
#define SIN3_ADDR 140
#define STR3_ADDR 142
#define SPD4_ADDR 144
#define SIN4_ADDR 145
#define STR4_ADDR 147
#define SPD5_ADDR 149
#define SIN5_ADDR 150
#define STR5_ADDR 152
 
#define SART_ADDR 134
#define OFFE_ADDR 135
#define FRF1_ADDR 136
#define FRF2_ADDR 137
#define FRF3_ADDR 138
#define ABTL_ADDR 139
#define QCTL_ADDR 140
#define MTXP_ADDR 141
#define MLAT_ADDR 142
#define PGEN_ADDR 143
#define SETD_ADDR 144
#define NDTH_ADDR 145
#define NATH_ADDR 146
#define EQSS_ADDR 147
#define MTXG_ADDR 148
#define AGCT_ADDR 149
#define AGCM_ADDR 150
#define  MUS_ADDR 151
#define MCUG_ADDR 152
#define  PCT_ADDR 153
#define PDTH_ADDR 154
#define NSAT_ADDR 155
#define TIQS_ADDR 156
#define MDBG_ADDR 157
#define RALG_ADDR 158
#define NAMG_ADDR 159
 
#define APPL_ADDR 160
#define LTNC_ADDR 161
#define LBLA_ADDR 162
#define  LBF_ADDR 163

#define NOBS_ADDR 168
#define T500_ADDR 169
#define MNFA_ADDR 170
#define MXNP_ADDR 171
#define  QSC_ADDR 172
#define TIMA_ADDR 173
#define TIMB_ADDR 175
#define TIMC_ADDR 177
#define TIMD_ADDR 179
#define FRPE_ADDR 181
#define DSTC_ADDR 182
#define MIIB_ADDR 183
#define STCO_ADDR 184

#define BK10_ADDR 196
#define BK32_ADDR 197
#define BK54_ADDR 198
#define  BK6_ADDR 199
#define XTAL_ADDR 200
#define SCSE_ADDR 201
#define ACSE_ADDR 202
//#define CHIP_ADDR 203 /* obsolete */
 
#define M28I_ADDR 208
 
#define COST_ADDR 256

#define RF1_STARTADDR   M28I_ADDR + (3  * 2)
#define RF2_STARTADDR   M28I_ADDR + (16 * 2)
#define RF3_STARTADDR   M28I_ADDR + (18 * 2)
#define RF1_5_STARTADDR M28I_ADDR + (20 * 2)
#define RF2_5_STARTADDR M28I_ADDR + (22 * 2)

/* TDC Bit map */
#define BIT_TX_Buf_Clear 0x40
#define BIT_Auto_Inhibit 0x20
#define BIT_TX_Resume    0x10

/* GEC Bit map */
#define BIT_CONNECT	0x80
#define BIT_NO_NA	0x20
#define BIT_TX_ENC	0x04
#define BIT_ENABLE 	0x01

/* RFC Bit map */
#define BIT_ANT_DIV_EN 0x80
#define BIT_TX_ANT_SEL 0x20
#define BIT_FAA_EN	   0x10

/* The following Variable are uses for STS MCU test software and GUI */

typedef struct {
    unsigned char	No_Qual_Slots;
    unsigned int  	Avg_Qual_Slots_Per_Second;
    unsigned char	No_Down_Slots;
    unsigned char	No_Up_Slots;
    unsigned char	No_FixDown_Slots;
    unsigned char	No_FixUp_Slots;
    double			Latency_At_Startup;
    double			Frame_Lenght;
    unsigned char	Startup_Latency;
    unsigned char	Min_Latency;
    unsigned char	Max_Latency;
    } Appl_Settings_Struct;

#define QUAL_HDR_SIZE 3
/********************************************************************************/
#define REGISTER_WRITE_START_CODE   (0x01) /* max2audio register rs232 interface*/
#define QUAL_START_CODE             (0x40) /* max2audio register rs232 interface*/
#define DATA_START_CODE             (0x60) /* max2audio register rs232 interface*/
#define I2C_RESULT_START_CODE       (0x2F) /* text based i2c dongle */
#define I2C_RESULT_STOP_CODE        (0x0D) /* text based i2c dongle */
#define I2C_PROMPT_CODE             (0x2A) /* text based i2c dongle */

typedef struct {
    unsigned char STAC;
    unsigned char PIAC;
    unsigned char AICS;
    unsigned char RFC;
    unsigned char MTXG;
    unsigned char UNCP;
    unsigned char CHIP;
    unsigned char ASC;
    } Appl_Reset_Struct;

typedef struct {
    unsigned char XTAL;
    unsigned char SCSE;
    unsigned char ACSE;
    } Clock_Config_Struct;

//extern   Appl_Reset_Struct Appl_Res_Set_CU[];

#endif   /* Adddress_Map_H */