darr80_func.c

2.4G无线音箱的接收程序,采用ATMEGA8单片机和STS公司的无线模块完成

	#endif

	/* UNCP: 41=(0x57) Uncompressed */
	I2C_Error += I2C_Write_Byte(UNCP_ADDR, 0x60);
	
	#if defined( CF2 ) || defined ( CF4 ) /* only for 24.576 clock configurations */
		if(Use_SPDIF)
		{
			/* STS1: 47=(0x26) SPDIF Timing Settings 1 */
			I2C_Error += I2C_Write_Byte(STS1_ADDR, 0x27);
		
			/* STS2: 48=(0x0A) SPDIF Timing Settings 2 */
			I2C_Error += I2C_Write_Byte(STS1_ADDR, 0x0A); /* is default setting */
		}
	#endif
	
    /*****************************/
    /*** Autonomous MU SECTION ***/
    /*****************************/
	/* GPIO: 57=(0x80) General Purpose IO => GPIO_1_INSYNC (Link_Led) */
	I2C_Error += I2C_Write_Byte(GPIO_ADDR, 0x02);
	/* GPC:  58=(0x00) General Purpose IO Control */
  	if (Use_ModuleMode == MU)
  	{
		/* GPIO_3_MON_TXD, GPIO_2_IRQ, OUT=GPIO_3,2,1,0 */
		/* for Clock Sync from CU to MU use GPIO_0 */
		/* Warning Connect Button is removed! */
		#ifdef PCB_IB_D2D
			/* do not use GPIO_0 as output on this board (blocking connect button) */
			I2C_Error += I2C_Write_Byte(GPC_ADDR, 0xCE);
		#else
  			I2C_Error += I2C_Write_Byte(GPC_ADDR, 0xCF);
  		#endif
	}
	else
	{
		/* GPIO_3_MON_TXD, GPIO_2_IRQ, OUT=GPIO_3,2,1, IN=GPIO_0(Connect Button) */
		I2C_Error += I2C_Write_Byte(GPC_ADDR, 0xCE);
	}
	
    /****************************/
    /*** Data Channel SECTION ***/
    /****************************/
	/* MDLA: 69=(0x10) Max Data Latency */
	I2C_Error += I2C_Write_Byte(MDLA_ADDR, 60); /* keep retrying to send data for 60 Frames of retries */

  #ifdef Stereo_1_NAck_CF1
    if  (Use_Application == 0) I2C_Error += I2C_Write_Byte(LBF_ADDR, 120);
  #endif /*Stereo_1_NAck_CF1*/
  #ifdef Stereo_2_NAck_CF1
    if (Use_Application == 1) I2C_Error += I2C_Write_Byte(LBF_ADDR, 100);
  #endif /*Stereo_2_NAck_CF1*/
  #ifdef Stereo_3_NAck_CF1
	if (Use_Application == 2) I2C_Error += I2C_Write_Byte(LBF_ADDR, 100);
  #endif /*Stereo_3_NAck_CF1*/
  #ifdef Stereo_4_NAck_CF1
	if (Use_Application == 3) I2C_Error += I2C_Write_Byte(LBF_ADDR, 100);
  #endif /*Stereo_4_NAck_CF1*/
  #ifdef HeadSet_1
	if (Use_Application == 4) I2C_Error += I2C_Write_Byte(LBF_ADDR, 50 );
  #endif /*HeadSet_1*/
  #ifdef HeadSet_2
	if (Use_Application == 5) I2C_Error += I2C_Write_Byte(LBF_ADDR, 50 );
  #endif /*HeadSet_2*/

    return (I2C_Error);
}

/******************************************************************************
*
* Function Name :   Config_System_Clock
*
* Purpose       :   Process registers for Clock Configuration CF1, CF2 and CF3
*
* Arguments     :   None
*
* Return value  :   I2C_Error
*
******************************************************************************/
unsigned char Config_System_Clock(void)
{
    unsigned char I2C_Error = 0;
	/***************************************/
	/*  PDC:  24=(0x0F) Power_Down_Control */
	/* MTXP: 141=(0x30) MON_TXD_Period     */
	/* XTAL: 200=(0x26) X-TAL              */
	/* SCSE: 201=(0x03) SYS_CLK_Sel        */
	/* ACSE: 202=(0x04) Audio_CLK_Sel      */
	/***************************************/
	
  	/*********************************/
  	/* SYS   clock select bits[2..0] */
  	/* 0 = Clk_in     pin (31)       */
  	/* 1 = Xtal_Clk   pin (23)       */
  	/* 2 = Active_Clk (auto select)  */
  	/*********************************/
  	/* Audio clock select bits[2..0] */
  	/* 0 = Clk_in     pin (31)       */
  	/* 1 = Xtal_Clk   pin (23)       */
  	/* 2 = Audio_Clk  pin  (8)       */
  	/* 3 = Active_Clk (auto select)  */
  	/*********************************/

	/******************************************/
	/******      CF1 (Fref = 22MHz)      ******/
	/******************************************/
	#ifdef CF1
		/* MON_TXD_Period => correction for baud rate */
  		/*I2C_Error += I2C_Write_Byte(MTXP_ADDR, 0x2D);*/
  		
  		/*** WARNING: First set clock selection, than disable clock osccilator ***/

		I2C_Error += I2C_Write_Byte(SCSE_ADDR, 0x00); /* Clk_in from Radio = 22Mc */

		/* DWAM80 L3 uses Audio_Clk_Pin for (8) */
        /*** DWAM79_80 then audio clock is connect to XTAL_pin.***/

//ALLANDWAM80		
#if defined( DWAM80 ) || defined ( PCB_I2C_BRIDGE ) /* CF2 does not have crystal so different xtal values need to be used */

		/* Audio_CLK_SEL => AUDIOCLKDIV = 0, AUDIOCLKDIVEN = 0, AUDIOCLKSEL = 2 = audio_clk */
        I2C_Error += I2C_Write_Byte(ACSE_ADDR, 0x02); /* Xtal_Clk from PCB through flex = 12,288Mc */
#else
      	      /* Audio_CLK_SEL => AUDIOCLKDIV = 0, AUDIOCLKDIVEN = 0, AUDIOCLKSEL = 2 = xtal_clk */
		I2C_Error += I2C_Write_Byte(ACSE_ADDR, 0x01); /* Xtal_Clk from PCB through flex = 12,288Mc */
#endif

	  	/*** leave Xtal oscilator running, Disable audio clock out on pin (8) ***/
    	/* XTAL: 200=(0x26) Xtal */
		I2C_Error += I2C_Write_Byte(XTAL_ADDR, 0x00);
		
		
		/*** For a DARR80 on a DWAM79 board ***/
		/* Audio_CLK_SEL => AUDIOCLKDIV = 1, AUDIOCLKDIVEN = 0, AUDIOCLKSEL = 2 = xtal_clk */
  		//if (Use_SPDIF) I2C_Error += I2C_Write_Byte(ACSE_ADDR, 0x11);
	#endif /* CF1 */
	/*****************************************/
	/******      CF3 (Fref = 22MHz)     ******/
	/*****************************************/
	#ifdef CF3
		/* MON_TXD_Period => correction for baud rate */
  		/*I2C_Error += I2C_Write_Byte(MTXP_ADDR, 0x2D); */
  		
		I2C_Error += I2C_Write_Byte(SCSE_ADDR, 0x01); /* Clk_in from Radio = 22Mc */

		/* Audio_CLK_SEL => AUDIOCLKDIV = 0, AUDIOCLKDIVEN = 0, AUDIOCLKSEL = Audio_Clock */
        I2C_Error += I2C_Write_Byte(ACSE_ADDR, 0x02);


  		/* XTAL => default is 0x26 => CLk_OUT_EN = 1, X_E = 1, X_S1 = 1 */
   		I2C_Error += I2C_Write_Byte(XTAL_ADDR, 0x25); 	/* 200 = 37 */

    	I2C_Error += I2C_Write_Byte(PDC_ADDR, 0x1F); /* reset value is 0x0F */


	#endif /* CF3 */

    return (I2C_Error);
}

/******************************************************************************
*
* Function Name :   Config_Modem
*
* Purpose       :   Configure the modem of the DARR79
*
* Arguments     :   none
*
* Return value  :   I2C_Error
*
******************************************************************************/
unsigned char Config_Modem (void)
{
	unsigned char I2C_Error = 0;
	
    if (Use_Own_WLAN_Detection == 1 )
    {
      I2C_Error += I2C_Write_Byte(SPE_ADDR, 0x07);

    }

	/* SART: 134=(0xA0) RX_Timing */
	
	if (Use_ModuleMode == MU) I2C_Error += I2C_Write_Byte(SART_ADDR, 0x60); /* 0x60 = 96 */
		
	/* QCTL: 140=(0x84) QPSK Control */
	#ifdef PCB_I2C_BRIDGE
		I2C_Error += I2C_Write_Byte(QCTL_ADDR, 0xA4); /* 0xA4 = 164 */
	#else
		if (Use_ModuleMode == MU) I2C_Error += I2C_Write_Byte(QCTL_ADDR, 0x86); /* 0x86 = 134 */
	#endif /* PCB_I2C_BRIDGE */

		
	/* MLAT: 142=(0x18) Modem Lock And Tracking */
	I2C_Error += I2C_Write_Byte(MLAT_ADDR, 0x18); /* Modem Lock and track ( is default value? Still needed?)*/

    /* EQSS: 147=(0x75) EQLZR step size */
	I2C_Error += I2C_Write_Byte(EQSS_ADDR, 0x65); /* 0x65 = 101 */
		
    /* MTXG: 148=(0xB4) MAX TX Gain */
    /* MCUG: 152=(0x34) Moden CU Gain */


	#ifdef DWAM80		
		I2C_Error += I2C_Write_Byte(MTXG_ADDR, 0x33); /* 0x33 = 51  settings */		
		I2C_Error += I2C_Write_Byte(MCUG_ADDR, 0x33); /* 0x33 = 51 for MU NACK power control */
	#else
		I2C_Error += I2C_Write_Byte(MTXG_ADDR, 0x37); /* 0x37 = 55  settings */		
		I2C_Error += I2C_Write_Byte(MCUG_ADDR, 0x37); /* 0x37 = 55 for MU NACK power control */
	#endif
	
	             		
	/* RALG: 158=(0x38) RX_AGCLoop_Gain */
	I2C_Error += I2C_Write_Byte(RALG_ADDR, 0x37); /* 0x37 = 55 */
	

	/* M28I: 208..256 MAX283X Init */
	//I2C_Error += I2C_Write_Byte(M28I_ADDR + ( 7 * 2)    , 0x2A); /* increases tx low pass filter bandwidth */
	I2C_Error += I2C_Write_Byte(M28I_ADDR + ( 7 * 2)    , 0x28); /* small bandiger RX Filter*/
	I2C_Error += I2C_Write_Byte(M28I_ADDR + ( 7 * 2) + 1, 0x30); /* increases tx low pass filter bandwidth */
	#if defined( CF2 ) || defined ( CF3 ) /* CF2 does not have crystal so different xtal values need to be used */
		I2C_Error += I2C_Write_Byte(M28I_ADDR + (14 * 2)    , 0x7F);
		I2C_Error += I2C_Write_Byte(M28I_ADDR + (14 * 2) + 1, 0x00);
	#else
		I2C_Error += I2C_Write_Byte(M28I_ADDR + (14 * 2)    , 0x00);
		I2C_Error += I2C_Write_Byte(M28I_ADDR + (14 * 2) + 1, 0x03);
	#endif

		
	if (Use_Application == 3) /* If 4 NACK */
	{
		I2C_Error += I2C_Write_Byte(ABTL_ADDR , 0x00); /* Turn off WLAN Back-off */
	}

   #ifdef MAX2834
    /*****************************************************************************************/
	/***************************** MAX2834 ***************************************************/
    /*****************************************************************************************/
    	Config_MAX2834();
    	
		/*** load Power Setting ***/
		if(FreqFixed & 0x08)
		{
			printf("Low Power\r");
			I2C_Error += I2C_Write_Byte(MTXG_ADDR, 0x80 | 1); /* power control OFF */
			I2C_Error += I2C_Write_Byte(MCUG_ADDR, 0x80 | 1); /* cu gain for mu */
		}
		else
		{
        	I2C_Error += I2C_Write_Byte(MTXG_ADDR, 0x33); /* (51) 16 dBm settings */
        	I2C_Error += I2C_Write_Byte(MCUG_ADDR, 0x33); /* (51) for MU NACK power control */
		}
    #endif /* MAX2834 */
    /* M28C: 26=(0x5A) MAX283X Control */
    I2C_Error += I2C_Write_Byte(M28C_ADDR, 0x80 + 0x40 + 0x12); /* select 2830 Interface, Enable RAM */
    I2C_Write_Byte(ASID_ADDR, 0x85);
    I2C_Write_Byte(ASTH_ADDR, 55);
    #ifdef NAMG_107
    		/* Special USA Exhibition version to reduce range and make less sensitive for interference */
    		/* NAMG: 159=(0x74) RX_NACK_Max_Gain */
			I2C_Error += I2C_Write_Byte(NAMG_ADDR, 0x6B); /* 0x6B = 107 */
    #endif /* NAMG_107 */

		
	return (I2C_Error);
}


/******************************************************************************
*
* Function Name :   Handle_Wake_up_Sleep_Interrupt
*
* Purpose       :   Handle shutting down and powering up of Unit
*					depending on audio Volume
*
* Arguments     :   none
*
* Return value  :   none
*
******************************************************************************/
void Handle_Wake_up_Sleep_Interrupt(void)
{	
	unsigned char STAC_Value;
	unsigned char PIAC_Value;

	if (Audio_Status == AUDIO)
	{
		amal_reg = I2C_Read_Byte(AMAL_ADDR);

		if (amal_reg < Sleep_threshold) /* default = 30 */
		{
			Snooze_Delay++;
			if (Snooze_Delay > Snooze_Delay_Timeout) /* default= 200, 60 is about 2-6 seconds before turning off */
			{
				Snooze_Delay = 0;
				Audio_Status = SNOOZE;
				/* going into snooze */
                /* search for headset application */

					/* on CU only */
					STAC_Value = Use_Speaker_Enable_Bits;
					PIAC_Value = Use_Speaker_Enable_Bits << 4;
	
					/* for headset applications on pos 4 and 5 */
					STAC_Value += PIAC_Value;
					PIAC_Value = STAC_Value;
	
					I2C_Write_Byte(STAC_ADDR, (STAC_Value & 0xF0)); /* mute audio up channel */
					Wait_For_mSec(50); 				 			    /* delay to fade out 25 mSec */
					//I2C_Write_Byte(PIAC_ADDR, (PIAC_Value & 0xF0)); /* shutdown active pipe */
				//}
				
				//Write_GEC_ADDR( 0x03);	/* snooze module = keep audio running but turn off RF and MODEM */
                SET_RFLEDS(0);
			}
		}
		else
		{
			Snooze_Delay = 0;
		}
	}
	else /* if (Audio_Status == SNOOZE) Received interrupt to wake up because audio reached  MIN_Level */
	{
                amal_reg = I2C_Read_Byte(AMAL_ADDR);	
          	if (amal_reg > Sleep_threshold) /* default = 30 */	
                {
                        Snooze_Delay++;
			if (Snooze_Delay > Snooze_Delay_Awake_Timeout) /* default= 100, 60 is about 2-6 seconds before turning off */
			{
		Snooze_Delay = 0;
		Audio_Status = AUDIO;

		/* going out of snooze */
                	#ifdef DEBUG
		            putstring("Awake \n");
                        #endif
		/* search for headset application */

			/* on CU only */
			STAC_Value = Use_Speaker_Enable_Bits;
			PIAC_Value = Use_Speaker_Enable_Bits << 4;
	
			/* for headset applications on pos 4 and 5 */
			STAC_Value += PIAC_Value;
			PIAC_Value = STAC_Value;
	
			I2C_Write_Byte(STAC_ADDR, STAC_Value);

		Write_GEC_ADDR( 0x01 + Connect_Bit); /* Enable module */
                        }
                }
                else
		{
			Snooze_Delay = 0;
		}
	}
}


/******************************************************************************
*
* Function Name :   Write_GEC_ADDR
*
* Purpose       :   The prevent the DARR to stop responing when the unit is disbled.
					Always use this function when writing to the GEC registers
*
* Arguments     :   8 bit of the GEC regsiters
*
*
******************************************************************************/
void Write_GEC_ADDR(unsigned char data)
{
   if   (((data&0x01)== 0) || ((data&0x02)!=0))
   {
      I2C_Write_Byte(GEC_ADDR , 0x08+1); /* Turn off transmit and reciever (Ext Sync mode)*/
      I2C_Write_Byte(PDDC_ADDR, 0);      /* turn of PDDC */
      Wait_For_mSec(40);
   }
   else
   {
        if (Use_ModuleMode == CU)
            I2C_Write_Byte (PDDC_ADDR, 0);
        else
            I2C_Write_Byte (PDDC_ADDR, PDDC_SETTING);
   }

   I2C_Write_Byte (GEC_ADDR, data);
}