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;======================================================;
; Register R10~R3F ;
;======================================================;
;
; (R10 ~ R3F): General Purpose Register
;
R10 == 0x10
R11 == 0x11
R12 == 0x12
R13 == 0x13
R14 == 0x14
R15 == 0x15
R16 == 0x16
R17 == 0x17
R18 == 0x18
R19 == 0x19
R1A == 0x1A
R1B == 0x1B
R1C == 0x1C
R1D == 0x1D
R1E == 0x1E
R1F == 0x1F
;
R20 == 0x20
R21 == 0x21
R22 == 0x22
R23 == 0x23
R24 == 0x24
R25 == 0x25
R26 == 0x26
R27 == 0x27
R28 == 0x28
R29 == 0x29
R2A == 0x2A
R2B == 0x2B
R2C == 0x2C
R2D == 0x2D
R2E == 0x2E
R2F == 0x2F
;
R30 == 0x30
R31 == 0x31
R32 == 0x32
R33 == 0x33
R34 == 0x34
R35 == 0x35
R36 == 0x36
R37 == 0x37
R38 == 0x38
R39 == 0x39
R3A == 0x3A
R3B == 0x3B
R3C == 0x3C
R3D == 0x3D
R3E == 0x3E
R3F == 0x3F
;
;==============================================================;
; Register IOC50 ~ IOCF0 ;
; Must be Set Bit0 of R5 to "0" and use IOW and IOR Instruction;
;==============================================================;
;
;PORT 5 I/O Control and PORT7,8 for LCD Segment Control Register
;
IOC50 == 0X05
P5CR == 0x05
IOC5 == 0x05
;
;{ ; Bit[n]="1",Set P5.[n] as Input Pin, n=7~4
; Bit[n]="0",Set P5[n] as Output Pin, n=7~4
mIOC57 == 0x80 ;
mIOC56 == 0x40 ;
mIOC55 == 0x20 ;
mIOC54 == 0x10 ;
; "0" : for General I/O
; "1" : for LCD Segment
mP8HS == 0x08 ; Switch P8.4~7 to General I/O or to LCD Segment Pin(SEG28~31).
mP8LS == 0x04 ; Switch P8.0~3 to General I/O or to LCD Segment Pin(SEG24~27).
mP7HS == 0x02 ; Switch P7.4~7 to General I/O or to LCD Segment Pin(SEG20~23).
mP7LS == 0x01 ; Switch P8.0~3 to General I/O or to LCD Segment Pin(SEG16~19).
;}
;
; Port 6 I/O Control Register
;
IOC60 == 0X06
P6CR == 0x06
IOC6 == 0x06
;
;{ ; Bit[n]="1", Set P6.[n] as Input Pin, n=7~0
; Bit[n]="0", Set P6.[n] as Output Pin, n=7~0
mIOC67 == 0x80 ;
mIOC66 == 0x40 ;
mIOC65 == 0x20 ;
mIOC64 == 0x10 ;
mIOC63 == 0x08 ;
mIOC62 == 0x04 ;
mIOC61 == 0x02 ;
mIOC60 == 0x01 ;
;}
;
; Port 7 I/O Control Register
;
IOC70 == 0X07
P7CR == 0x07
IOC7 == 0x07
;
;{ ; Bit[n]="1", Set P7.[n] as Input Pin, n=7~0
; Bit[n]="0", Set P7.[n] as Output Pin, n=7~0
mIOC77 == 0x80 ;
mIOC76 == 0x40 ;
mIOC75 == 0x20 ;
mIOC74 == 0x10 ;
mIOC73 == 0x08 ;
mIOC72 == 0x04 ;
mIOC71 == 0x02 ;
mIOC70 == 0x01 ;
;}
;
; Port 8 I/O Control Register
;
IOC80 == 0X08
P8CR == 0x08
IOC8 == 0x08
;
;{ ; Bit[n]="1", Set P8.[n] as Input Pin, n=7~0
; Bit[n]="0", Set P8.[n] as Output Pin, n=7~0
mIOC87 == 0x80 ;
mIOC86 == 0x40 ;
mIOC85 == 0x20 ;
mIOC84 == 0x10 ;
mIOC83 == 0x08 ;
mIOC82 == 0x04 ;
mIOC81 == 0x02 ;
mIOC80 == 0x01 ;
;}
;
; 128 Byte RAM Address
;
IOC90 == 0X09
RAM_ADDR == 0X09
RAMAR == 0X09
;
; 128 Byte RAM Data Buffer
;
IOCA0 == 0X0A
RAM_DB == 0X0A
RAMBR == 0x0A
;
; Counter 1 Preset Register
;
IOCB0 == 0X0B
CNT1PR == 0X0B
;
; Counter 2 Preset Register
;
IOCC0 == 0X0C
CNT2PR == 0X0C
;
; High Pulse Width Timer Preset Register
;
IOCD0 == 0X0D
HPWTPR == 0X0D
;
; Low Pulse Width Timer Preset Register
;
IOCE0 == 0X0E
LPWTPR == 0X0E
;
; Interrupt Mask Register
;
IOCF0 == 0X0F
IMR == 0X0F
;
;{ ; "0" : Disable Interrupt.
; "1" : Enable Interrupt.
mICIE == 0x80 ; Pin Change Wake Up Interrupt Enable Bit
mLPWTE == 0x40 ; Low Pulse Width Timer Interrupt Enable Bit
mHPWTE == 0x20 ; High Pulse Width Timer Interrupt Enable Bit
mCNT2E == 0x10 ; Counter 2 Interrupt Enable Bit
mCNT1E == 0x08 ; Counter 2 Interrupt Enable Bit
mINT1E == 0x04 ; INT1 Interrupt Enable Bit
mINT0E == 0x02 ; INT0 Interrupt Enable Bit
mTCIE == 0x01 ; TCC Interrupt Enable Bit
;}
;
;==============================================================;
; Register IOC61~IOCF1 ;
; Must be Set Bit0 of R5 to "1" and use IOW and IOR Instruction;
;==============================================================;
;
; Wake up control Register and IROUT Sink Current Control
;
IOC61 == 0X06
WUCR == 0X06
;
;{
mIROCS == 0x80 ; IROUT/P5.7 Sink current Set Bit.
; "0" : Normal
; "1" : Double Current
; bit 6~4 not use
mWUE8HB == 0x08 ; P8.4~7 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
mWUE8LB == 0x04 ; P8.0~3 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
mWUE6HB == 0x02 ; P6.4~7 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
mWUE6LB == 0x01 ; P6.0~3 Pin Change Wake up Function.
; "0" : Enable
; "1" : Disable
;}
;
; TCC Control Register and INT0 Edge Set
;
IOC71 == 0X07
TCCCR == 0X07
;
;{
mINT_EDGE == 0x80 ; INT0 Edge Select Bit.
; "0" : Rising Edge
; "1" : Falling Edge
mINT == 0x40 ; INT Enable Flag
mTS == 0x20 ; TCC Signal Source.
; "0" : Internal Instruction Cycle Clock
; "1" : Transition on TCC Pin.
mTE == 0x10 ; TCC Signal Edge Select bit.
; "0" : Rising Edge
; "1" : Falling Edge
mPSRE == 0x08 ; Prescaler Register Enable Bit.
; "0" : TCC Rate 1:1,
; "1" : Depend on Table
mTCCP2 == 0x04 ; TCC Prescaler Select Bit[2]
mTCCP1 == 0x02 ; TCC Prescaler Select Bit[1]
mTCCP0 == 0x01 ; TCC Prescaler Select Bit[0]
;
; |----|-----|-----|-----|----------|
; |PSRE|TCCP2|TCCP1|TCCP0| TCC rate |
; |----|-----|-----|-----|----------|
; | 0 | x | x | x | 1:1 |
; | 1 | 0 | 0 | 0 | 1:2 |
; | 1 | 0 | 0 | 1 | 1:4 |
; | 1 | 0 | 1 | 0 | 1:8 |
; | 1 | 0 | 1 | 1 | 1:16 |
; | 1 | 1 | 0 | 0 | 1:32 |
; | 1 | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1 | 1:256 |
; |----|-----|-----|-----|----------|
;}
;
; WDT(Watch Dog Timer) Control Register
;
IOC81 == 0x08
WDTCR == 0x08
;
;{
; bit 7~4 not use
mWDTE == 0x08 ; WDT Enable Bit."0":Disable,"1":Enable
mWDTP2 == 0x04 ; WDT Prescaler Select Bit[2]
mWDTP1 == 0x02 ; WDT Prescaler Select Bit[1]
mWDTP0 == 0x01 ; WDT Prescaler Select Bit[0]
;
; |-----|-----|-----|----------|
; |WDTP2|WDTP1|WDTP0| WDT rate |
; |-----|-----|-----|----------|
; | 0 | 0 | 0 | 1:1 |
; | 0 | 0 | 1 | 1:2 |
; | 0 | 1 | 0 | 1:4 |
; | 0 | 1 | 1 | 1:8 |
; | 1 | 0 | 0 | 1:16 |
; | 1 | 0 | 1 | 1:32 |
; | 1 | 1 | 0 | 1:64 |
; | 1 | 1 | 1 | 1:128 |
; |-----|-----|-----|----------|
;}
;
; Counter1 and Counter2 Control Register
;
IOC91 == 0x09
CNT12CR == 0x09
;
;{
mCNT2S == 0x80 ; Counter 2 Clock Source select bit.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mCNT2P2 == 0x40 ; Counter 2 Prescaler Select Bit[2]
mCNT2P1 == 0x20 ; Counter 2 Prescaler Select Bit[1]
mCNT2P0 == 0x10 ; Counter 2 Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |CNT2P2|CNT2P1|CNT2P0| Counter2 Scaler|
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;
mCNT1S == 0x08 ; Counter 1 Clock Source select bit.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mCNT1P2 == 0x04 ; Counter 1 Prescaler Select Bit[2]
mCNT1P1 == 0x02 ; Counter 1 Prescaler Select Bit[1]
mCNT1P0 == 0x01 ; Counter 1 Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |CNT1P2|CNT1P1|CNT1P0| Counter1 Scaler|
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;}
;
; High/Low Pulse Width Timer Control Register
;
IOCA1 == 0x0A
HLPWTCR == 0x0A
;
;{
mLPWTS == 0x80 ; Low Pulse Width Timer Clock Source select.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mLPWTP2 == 0x40 ; Low Pulse Width Timer Prescaler Select Bit[2]
mLPWTP1 == 0x20 ; Low Pulse Width Timer Prescaler Select Bit[1]
mLPWTP0 == 0x10 ; Low Pulse Width Timer Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |LPWTP2|LPWTP1|LPWTP0| LPWT Scaler |
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;
mHPWTS == 0x08 ; High Pulse Width Timer Clock Source select.
; "0" : Fs (sub oscillator)
; "1" : Fm (main oscillator)
mHPWTP2 == 0x04 ; High Pulse Width Timer Prescaler Select Bit[2]
mHPWTP1 == 0x02 ; High Pulse Width Timer Prescaler Select Bit[1]
mHPWTP0 == 0x01 ; High Pulse Width Timer Prescaler Select Bit[0]
;
; |------|------|------|----------------|
; |HPWTP2|HPWTP1|HPWTP0| HPWT Scaler |
; |------|------|------|----------------|
; | 0 | 0 | 0 | 1:2 |
; | 0 | 0 | 1 | 1:4 |
; | 0 | 1 | 0 | 1:8 |
; | 0 | 1 | 1 | 1:16 |
; | 1 | 0 | 0 | 1:32 |
; | 1 | 0 | 1 | 1:64 |
; | 1 | 1 | 0 | 1:128 |
; | 1 | 1 | 1 | 1:256 |
; |------|------|------|----------------|
;}
;
; Port 6 Pull High Control Register
;
IOCB1 == 0X0B
P6PH == 0X0B
;
;{ ; Bit[n]="0", Disable P6.[n] Pull High Function.n=7~0
; Bit[n]="1", Enable P6.[n] Pull High Function.n=7~0
mPH67 == 0x80 ;
mPH66 == 0x40 ;
mPH65 == 0x20 ;
mPH64 == 0x10 ;
mPH63 == 0x08 ;
mPH62 == 0x04 ;
mPH61 == 0x02 ;
mPH60 == 0x01 ;
;}
;
; Port 6 Open Drain Control Register
;
IOCC1 == 0X0C
P6OD == 0X0C
;
;{ ; Bit[n]="0", Disable P6.[n] Open Drain Function. n=7~0
; Bit[n]="1", Enable P6.[n] Open Drain Function. n=7~0
mOD67 == 0x80 ;
mOD66 == 0x40 ;
mOD65 == 0x20 ;
mOD64 == 0x10 ;
mOD63 == 0x08 ;
mOD62 == 0x04 ;
mOD61 == 0x02 ;
mOD60 == 0x01 ;
;}
;
; Port 8 Pull High Control Register
;
IOCD1 == 0X0D
P8PH == 0X0D
P8PHCR == 0x0d
;
;{ ; Bit[n]="0", Disable P8.[n] Pull High Function. n=7~0
; Bit[n]="1", Enable P8.[n] Pull High Function. n=7~0
mPH87 == 0x80 ;
mPH86 == 0x40 ;
mPH85 == 0x20 ;
mPH84 == 0x10 ;
mPH83 == 0x08 ;
mPH82 == 0x04 ;
mPH81 == 0x02 ;
mPH80 == 0x01 ;
;}
;
; Port 6 Pull Low Control Register
;
IOCE1 == 0X0E
P6PL == 0X0E
;
;{ ; Bit[n]="0", Disable P6.[n] Pull Low Function. n=7~0
; Bit[n]="1", Enable P6.[n] Pull Low Function. n=7~0
mPL67 == 0x80 ;
mPL66 == 0x40 ;
mPL65 == 0x20 ;
mPL64 == 0x10 ;
mPL63 == 0x08 ;
mPL62 == 0x04 ;
mPL61 == 0x02 ;
mPL60 == 0x01 ;
;}
;
;======================================================;
; Others Define by Brian Zou/Oct 12, 07 ;
;======================================================;
;
; Bit set use BC or BS
;
mB0 == 0x01
mB1 == 0x02
mB2 == 0x04
mB3 == 0x08
mB4 == 0x10
mB5 == 0x20
mB6 == 0x40
mB7 == 0x80
B027 == 0xff
;
/* CONSTANT define area */
FALSE == 0x000
TRUE == 0x001
/**********************/
;
IDLEFLAG == SBPCR.3
PAGEFLAG == R5.0
;
P68CB == 0x07 ; PORT 6&8 input port change interrupt bit
LPWTB == 0x06 ; low pulse width timer interrupt bit
HPWTB == 0x05 ; high pulse width timer interrupt bit
CNT2B == 0x04 ; count2 overflow interrupt bit
CNT1B == 0x03 ; count1 overflow interrupt bit
INT1B == 0x02 ; int1 pin change interrupt bit
;INT0B == 0x01 ; int0 pin change interrupt bit
MOTORB == 0x01 ; int0 pin change interrupt bit
TCCB == 0x00 ; tcc overflow interrupt bit
;
/* program rom page table */
/*
page0 : 0000~03ff
page1 : 0400~07ff
page2 : 0800~0bff
page3 : 0c00~0fff
*/
/**********************************************
______LCD define______
1/3bias, 1/4duty, 3.0v, 32Hz flash frequency
**********************************************/
/* define LCD common layout ---- here COM as C0M */
C0M0 == 00
C0M1 == mB3
C0M2 == mB2
C0M3 == mB1
C0M4 == mB0
C0M5 == mB7
C0M6 == mB6
C0M7 == mB5
C0M8 == mB4
/****************************/
C0Ma == mB0
C0Mb == mB5
C0Mc == mB6
C0Md == mB7
C0Me == mB3
C0Mf == mB1
C0Mg == mB2
/* define LCD segment layout*/
SG01 == 00
SG02 == 01
SG03 == 02
SG04 == 03
SG05 == 04
SG06 == 05
SG07 == 06
SG08 == 07
SG09 == 08
SG10 == 09
SG11 == 10
SG12 == 11
SG13 == 12
SG14 == 13
SG15 == 14
SG16 == 15
SG17 == 16
SG18 == 17
SG19 == 18
SG20 == 19
/* define weekly constant */
MON == mB5 ; SG01
TUE == mB3 ; SG01
WED == mB2 ; SG01
THU == mB1 ; SG01
FRI == mB0 ; SG02
SAT == mB7 ; SG02
SUN == mB6 ; SG02
/* define icon constant */
S1 == C0M3 ; SG07
S2 == C0M4 ; SG07
S3 == C0M4 ; SG08
S4 == C0M3 ; SG17
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