tsk3000_load_from_flash.constraint

TSK3000 Load From Flash Altium Designer 编译通过.

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;Constraints File
;   Device  : Any
;   Board   : Any
;   Project : TSK3000_Load_From_Flash.PrjFpg
;
;   Created 16-December-2004
;   Altium Limited
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Record=FileHeader | Id=DXP Constraints v1.0
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD              | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=CLK_BRD              | FPGA_CLOCK_FREQUENCY=20 Mhz
Record=Constraint | TargetKind=Port | TargetId=CLK_REF              | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=CLK_REF              | FPGA_CLOCK_FREQUENCY=20 Mhz
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK       | FPGA_CLOCK=TRUE
Record=Constraint | TargetKind=Port | TargetId=JTAG_NEXUS_TCK       | FPGA_CLOCK_FREQUENCY=1 Mhz
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