📄 mts.c
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/***************************************************************************
** File name : mts.c
** Author : x.cheng
** Create date :
**
** Comment:
** multitask system module
**
** Revisions:
** $Log: mts.c,v $
** Revision 1.1.1.1 2005/07/27 06:53:15 x.cheng
** add into repositories
**
**
***************************************************************************/
#include "const.h"
#include "type.h"
#include "stdarg.h"
#include "string.h"
#include "queue.h"
#include "..\..\inc\i386\page.h" //kernel\inc\i386
#include "..\..\inc\i386\x86.h"
#include "..\..\inc\i386\system.h"
#include "..\..\inc\task.h" //kernel\inc
#include "..\..\inc\mts.h"
#include "..\..\inc\tui.h"
#include "..\..\inc\vmm.h"
#define __MTS_SRC__
#include "..\inc\def_mts.h"
#include "..\inc\def_sched.h"
//------------------------------------------------
ts_Task *pstMtsGetCurrentTask()
{
return (g_pstCurrentTask);
}
/************************************************************
*************************************************************
** Function Name: vMtsInitial
** Author: x.cheng
**
** Comment:
** initilize multitask system
**
** List of parameters:
**
**
** Return value:
** .
**
** Revisions:
** .
*************************************************************
*************************************************************/
void vMtsInitial( void )
{
//create the "init" task
g_pstCurrentTask = pstMt1CreateProcess(NULL, "init", KERNEL_PRIVILEGE);
//set the console
g_pstCurrentTask->iConsole = 0;
// After the init thread is out it will become the idle task.
g_pstIdleTask = g_pstCurrentTask;
// Load task register.
__asm__ __volatile__ ("ltr %0" : : "a" (g_pstCurrentTask->uiTssSelector));
}
/*
from Volume 3 System Programming....
6.2.3. Task Register
The task register holds the 16-bit segment selector and the entire segment
descriptor (32-bit base address, 16-bit segment limit, and descriptor attributes)
for the TSS of the current task (refer to Figure 2-4 in Chapter 2, System Architecture
Overview). This information is copied from the TSS descriptor in the GDT for the current
task. Figure 6-4 shows the path the processor uses to accesses the TSS, using the
information in the task register.
The task register has both a visible part (that can be read and changed by software)
and an invisible part (that is maintained by the processor and is inaccessible by software).
The segment selector in the visible portion points to a TSS descriptor in the GDT.
The processor uses the invisible portion of the task register to cache the segment
descriptor for the TSS. Caching these values in a register makes execution of the
task more efficient, because the processor does not need to fetch these values from
memory to reference the TSS of the current task.
The LTR (load task register) and STR (store task register) instructions load and
read the visible portion of the task register. The LTR instruction loads a segment
selector (source operand) into the task register that points to a TSS descriptor in
the GDT, and then loads the invisible portion of the task register with information
from the TSS descriptor. This instruction is a privileged instruction that may be
executed only when the CPL is 0. The LTR instruction generally is used during system
initialization to put an initial value in the task register. Afterwards, the contents
of the task register are changed implicitly when a task switch occurs.
The STR (store task register) instruction stores the visible portion of the task
register in a general-purpose register or memory. This instruction can be executed by
code running at any privilege level, to identify the currently running task; however,
it is normally used only by operating system software.
On power up or reset of the processor, the segment selector and base address are
set to the default value of 0 and the limit is set to FFFFH.
*/
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