📄 smart.lst
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(0202) unsigned int addata;
(0203) ADCSRA|=BIT(ADSC);
0125 9A36 SBI 0x06,6
(0204) while(!(ADCSRA&(BIT(ADIF))));
0126 9B34 SBIS 0x06,4
0127 CFFE RJMP 0x0126
(0205) addata=ADCL;
0128 B144 IN R20,0x04
0129 2755 CLR R21
(0206) addata=addata+ADCH*256;
012A B125 IN R18,0x05
012B 2733 CLR R19
012C E000 LDI R16,0
012D E011 LDI R17,1
012E 940E03DE CALL empy16s
0130 0F40 ADD R20,R16
0131 1F51 ADC R21,R17
(0207) return addata;
0132 018A MOVW R16,R20
0133 940E03FF CALL pop_gset1
0135 9508 RET
(0208) }
(0209)
(0210)
(0211)
(0212) ///////////////////////////////////////////////////////////////////////////////////////////////////////
(0213)
(0214) #define BYTE_BIT0 0x01
(0215) #define BYTE_BIT1 0x02
(0216) #define BYTE_BIT2 0x04
(0217) #define BYTE_BIT3 0x08
(0218) #define BYTE_BIT4 0x10
(0219) #define BYTE_BIT5 0x20
(0220) #define BYTE_BIT6 0x40
(0221) #define BYTE_BIT7 0x80
(0222) //<nRF2401_Pins 对应引脚>
(0223) /*sbit PWR_UP = P1^6;
(0224) sbit CE = P1^2;
(0225) //sbit DR2 = P3^5; //暂时没有用到
(0226) //sbit CLK2 = P3^4;
(0227) //sbit OUT2 = P3^3;
(0228) sbit CS = P1^1;
(0229) sbit DR1 = P1^0;
(0230) sbit CLK1 = P3^7;
(0231) sbit DATA = P3^3;
(0232) sbit LED0 = P3^4;
(0233) sbit LED1 = P3^5;
(0234) sbit KEY0 = P3^0;
(0235) sbit KEY1 = P3^1;
(0236) */
(0237) #define NRF_PORT PORTC
(0238) #define NRF_DDR DDRC
(0239) #define NRF_PIN PINC
(0240)
(0241) #define PWR_UP PC0
(0242) #define CE PC1
(0243) #define CS PC4
(0244) #define DR1 PC2
(0245) #define CLK1 PC3
(0246) #define DATA PC5
(0247)
(0248) #define PWR_UP_STATE (NRF_PIN&(1<<PWR_UP))==(1<<PWR_UP)
(0249) #define CE_STATE (NRF_PIN&(1<<CE))==(1<<CE)
(0250) #define CS_STATE (NRF_PIN&(1<<CS))==(1<<CS)
(0251) #define DR1_STATE (NRF_PIN&(1<<DR1))==(1<<DR1)
(0252) #define CLK1_STATE (NRF_PIN&(1<<CLK1))==(1<<CLK1)
(0253) #define DATA_STATE (NRF_PIN&(1<<DATA))==(1<<DATA)
(0254)
(0255) #define PWR_UP_SET() {NRF_PORT|=1<<PWR_UP;}
(0256) #define PWR_UP_CLR() {NRF_PORT&=~(1<<PWR_UP);}
(0257) #define CE_SET() {NRF_PORT|=1<<CE;}
(0258) #define CE_CLR() {NRF_PORT&=~(1<<CE);}
(0259) #define CS_SET() {NRF_PORT|=1<<CS;}
(0260) #define CS_CLR() {NRF_PORT&=~(1<<CS);}
(0261) #define DR1_SET() {NRF_PORT|=1<<DR1;}
(0262) #define DR1_CLR() {NRF_PORT&=~(1<<DR1);}
(0263) #define CLK1_SET() {NRF_PORT|=1<<CLK1;}
(0264) #define CLK1_CLR() {NRF_PORT&=~(1<<CLK1);}
(0265) #define DATA_SET() {NRF_PORT|=1<<DATA;}
(0266) #define DATA_CLR() {NRF_PORT&=~(1<<DATA);}
(0267) /*
(0268) #define LED0_SET() {PORTC|=1<<PC0;DDRC|=1<<PC0;}
(0269) #define LED0_CLR() {PORTC&=~(1<<PC0);}
(0270) #define LED1_SET() {PORTC|=1<<PC1;DDRC|=1<<PC1;}
(0271) #define LED1_CLR() {PORTC&=~(1<<PC1);}
(0272)
(0273) #define KEY0 (PINB&(1<<PB0))
(0274) #define KEY1 (PINB&(1<<PB1))
(0275) #define KEY_INIT() {PORTB|=((1<<PB0)|(1<<PB1));DDRB&=~((1<<PB0)|(1<<PB1));}
(0276)
(0277) /*
(0278) *************************************************************
(0279) * nRF2401 Configuration *
(0280) * 保存2401 的配置信息 *
(0281) *************************************************************
(0282) */
(0283) /*=====<RF-Configuration-Register 配置信息>=====*/
(0284) //芯片测试用,无需修改
(0285) #define TEST_2 0x8E //MSB D143~D136
(0286) #define TEST_1 0x08 // D135~D128
(0287) #define TEST_0 0x1C // D127~D120
(0288) /* 注意: DATAx_W + ADDRx_W + CRC 的值必须小于256 !
(0289) 单个数据包的大小必须小于32 字节(256 位) */
(0290) #define DATA2_W 0x10 //0x10=2 字节 //频道2 发送/接收数据长度(单位:Bit)
(0291) #define DATA1_W 0xE0 //0x20=28 字节 //频道1 发送/接收数据长度(单位:Bit)
(0292) /* 注意:2401 忽略ADDR 中超过ADDR_W 设定宽度的那些位,同时地址不能全部设置为0 */
(0293) //频道2 接收地址 < － 频道2 未启用
(0294) #define ADDR2_4 0x00
(0295) #define ADDR2_3 0x1c
(0296) #define ADDR2_2 0xcc
(0297) #define ADDR2_1 0xcc
(0298) #define ADDR2_0 0xcc
(0299) //频道 1 接收地址 (当前模块地址) <－ 只使用到频道 1
(0300) #define ADDR1_4 0x00
(0301) #define ADDR1_3 0xcc
(0302) #define ADDR1_2 0xcc
(0303) #define ADDR1_1 0xcc
(0304) #define ADDR1_0 0xcc
(0305) #define ADDR_W 0x10 //0x10=2 字节 //发送/接收地址宽度(单位:Bit)
(0306) #define CRC_L 0x1 //CRC 模式 0:8 位 1:16 位
(0307) #define CRC_EN 0x1 //CRC 校验 0:禁用 1:启用
(0308) #define RX2_EN 0x0 //双频道功能 0:禁用 1:启用
(0309) #define CM 0x1 //0:Direct mode 1:ShockBurst mode
(0310) #define RFDR_SB 0x0 //传输速率0:250kbps/1:1Mbps(250kbps比1Mbps传输距离更远)
(0311) #define XO_F 0x3 //16M //nRF2401 晶振频率(具体设置见下图)
(0312) #define RF_PWR 0x3 //信号发射功率(具体设置见下图)
(0313) #define RF_CH 0x2 //Channel RF 频率设置
(0314) //Channel = 2400MHz + RF_CH * 1.0MHz
(0315) #define RXEN_NRF 0x0 //0:Tx 1:Rx
(0316) //程序会通过 SetTxMode/SetRxMode 重新设置此项参数
(0317) //<将设置信息组合成每个字节的数据信息，此区域无需修改>
(0318) #define RFConfig_Bit0 TEST_2
(0319) #define RFConfig_Bit1 TEST_1
(0320) #define RFConfig_Bit2 TEST_0
(0321) #define RFConfig_Bit3 DATA2_W
(0322) #define RFConfig_Bit4 DATA1_W
(0323) #define RFConfig_Bit5 ADDR2_4
(0324) #define RFConfig_Bit6 ADDR2_3
(0325) #define RFConfig_Bit7 ADDR2_2
(0326) #define RFConfig_Bit8 ADDR2_1
(0327) #define RFConfig_Bit9 ADDR2_0
(0328) #define RFConfig_Bit10 ADDR1_4
(0329) #define RFConfig_Bit11 ADDR1_3
(0330) #define RFConfig_Bit12 ADDR1_2
(0331) #define RFConfig_Bit13 ADDR1_1
(0332) #define RFConfig_Bit14 ADDR1_0
(0333) #define RFConfig_Bit15 (ADDR_W<<2 | CRC_L<<1 | CRC_EN)
(0334) #define RFConfig_Bit16 (RX2_EN<<7 | CM<<6 | RFDR_SB<<5 | XO_F <<2 | RF_PWR)
(0335) #define RFConfig_Bit17 (RF_CH<<1 | RXEN_NRF)
(0336)
(0337) //------------------------------------------------------
(0338) //通过宏定义将 18 字节的寄存器参数按照各个功能分解,以便于参数的调整
(0339) unsigned char /*code*/ nRF2401_Conf[18] =
(0340) {
(0341) RFConfig_Bit0, RFConfig_Bit1, RFConfig_Bit2, RFConfig_Bit3, RFConfig_Bit4,
(0342) RFConfig_Bit5, RFConfig_Bit6, RFConfig_Bit7, RFConfig_Bit8, RFConfig_Bit9,
(0343) RFConfig_Bit10, RFConfig_Bit11, RFConfig_Bit12, RFConfig_Bit13,
(0344) RFConfig_Bit14, RFConfig_Bit15, RFConfig_Bit16, RFConfig_Bit17
(0345) };
(0346) //------------------------------------------------------------
(0347)
(0348) /*
(0349) *************************************************************
(0350) * nRF2401 Tx/Rx functions
(0351) *
(0352) *
(0353) * void Delay100(void);
(0354) * void Config2401(void); //配置2401,写入初始化设置
(0355) * void SetTxMode(void); //设置为发送模式
(0356) * void SetRxMode(void); //设置为接收模式
(0357) * void nRF2401_TxPacket(unsigned char TxBuf[]);
(0358) * //发送TxBuf[] 内的数据 长度由 DATA1_W 决定
(0359) * unsigned char nRF2401_RxPacket(unsigned char *RxBuf);
(0360) * //检查是否有数据需要接受 如果有,则保存至RxBuf[]
(0361) * //返回值 0:没有接收到数据 1:接收到数据
(0362) *************************************************************
(0363) */
(0364) //16M 晶振 600us 左右
(0365) /*void Delay100(void)
(0366) {
(0367) unsigned int i;
(0368) for (i=0;i<100;i++);
(0369) }*/
(0370)
(0371) /*==================================================
(0372) nRF2401 设置配置寄存器时序
(0373) =====================================================*/
(0374) //bdata
(0375) unsigned char DATA_BUF; //用于ByteRead和ByteWrite函数
(0376) #define DATA7 ((DATA_BUF&BYTE_BIT7) != 0)
(0377) #define DATA0 ((DATA_BUF&BYTE_BIT0) != 0)
(0378)
(0379)
(0380) void delay_1us(void) //1us延时函数
(0381) {
(0382) asm("nop");
_delay_1us:
0136 0000 NOP
0137 9508 RET
_delay_nus:
i --> R20
n --> R22
0138 940E03FA CALL push_gset2
013A 01B8 MOVW R22,R16
(0383) }
(0384)
(0385) void delay_nus(unsigned int n) //N us延时函数
(0386) {
(0387) unsigned int i=0;
013B 2744 CLR R20
013C 2755 CLR R21
(0388) for (i=0;i<n;i++)
013D C003 RJMP 0x0141
(0389) delay_1us();
013E DFF7 RCALL _delay_1us
013F 5F4F SUBI R20,0xFF
0140 4F5F SBCI R21,0xFF
0141 1746 CP R20,R22
0142 0757 CPC R21,R23
0143 F3D0 BCS 0x013E
0144 940E03EE CALL pop_gset2
0146 9508 RET
(0390) }
(0391)
(0392) void delay_1ms(void) //1ms延时函数
(0393) {
(0394) unsigned int i;
(0395) for (i=0;i<1140;i++);
_delay_1ms:
i --> R16
0147 2700 CLR R16
0148 2711 CLR R17
0149 C002 RJMP 0x014C
014A 5F0F SUBI R16,0xFF
014B 4F1F SBCI R17,0xFF
014C 3704 CPI R16,0x74
014D E0E4 LDI R30,4
014E 071E CPC R17,R30
014F F3D0 BCS 0x014A
0150 9508 RET
_delay_nms:
i --> R20
n --> R22
0151 940E03FA CALL push_gset2
0153 01B8 MOVW R22,R16
(0396) }
(0397)
(0398) void delay_nms(unsigned int n) //N ms延时函数
(0399) {
(0400) unsigned int i=0;
0154 2744 CLR R20
0155 2755 CLR R21
(0401) for (i=0;i<n;i++)
0156 C003 RJMP 0x015A
(0402) delay_1ms();
0157 DFEF RCALL _delay_1ms
0158 5F4F SUBI R20,0xFF
0159 4F5F SBCI R21,0xFF
015A 1746 CP R20,R22
015B 0757 CPC R21,R23
015C F3D0 BCS 0x0157
015D 940E03EE CALL pop_gset2
015F 9508 RET
(0403) }
(0404)
(0405)
(0406)
(0407) unsigned char ByteRead(void)
(0408) {
(0409) unsigned char i;
(0410) for (i=0;i<8;i++)
_ByteRead:
i --> R16
0160 2700 CLR R16
0161 C018 RJMP 0x017A
(0411) {
(0412) DATA_BUF=DATA_BUF<<1;
0162 90200096 LDS R2,DATA_BUF
0164 0C22 LSL R2
0165 92200096 STS DATA_BUF,R2
(0413) //CLK1=1;
(0414) CLK1_SET();
0167 9AAB SBI 0x15,3
(0415) //DATA=1; //设置为输入状态
(0416) NRF_DDR&=~(1<<DATA);
0168 98A5 CBI 0x14,5
(0417) DATA_SET();
0169 9AAD SBI 0x15,5
(0418) //if (DATA) //读取最高位，保存至最末尾，通过左移位完成整个字节
(0419) if(DATA_STATE)
016A B383 IN R24,0x13
016B 7280 ANDI R24,0x20
016C 3280 CPI R24,0x20
016D F429 BNE 0x0173
(0420) {
(0421) DATA_BUF|=BYTE_BIT0;
016E 2D82 MOV R24,R2
016F 6081 ORI R24,1
0170 93800096 STS DATA_BUF,R24
(0422) }
0172 C005 RJMP 0x0178
(0423) else
(0424) {
(0425) DATA_BUF&=~BYTE_BIT0;
0173 91800096 LDS R24,DATA_BUF
0175 7F8E ANDI R24,0xFE
0176 93800096 STS DATA_BUF,R24
(0426) }
(0427) //CLK1=0;
(0428) CLK1_CLR();
0178 98AB CBI 0x15,3
0179 9503 INC R16
017A 3008 CPI R16,0x8
017B F330 BCS 0x0162
(0429) }
(0430) return DATA_BUF;
017C 91000096 LDS R16,DATA_BUF
017E 9508 RET
_ByteWrite:
i --> R20
send --> R16
017F 940E03FC CALL push_gset1
(0431) }
(0432)
(0433) void ByteWrite(unsigned char send)
(0434) {
(0435) unsigned char i;
(0436) DATA_BUF=send;
0181 93000096 STS DATA_BUF,R16
(0437) NRF_DDR|=((1<<DATA)|(1<<CLK1));
0183 B384 IN R24,0x14
0184 6288 ORI R24,0x28
0185 BB84 OUT 0x14,R24
(0438) for (i=0;i<8;i++)
0186 2744 CLR R20
0187 C00F RJMP 0x0197
(0439) {
(0440) if (DATA7) //总是发送最高位
0188 90200096 LDS R2,DATA_BUF
018A FE27 SBRS R2,7
018B C002 RJMP 0x018E
(0441) {
(0442) //DATA=1;
(0443) DATA_SET();
018C 9AAD SBI 0x15,5
(0444) }
018D C001 RJMP 0x018F
(0445) else
(0446) {
(0447) //DATA=0;
(0448) DATA_CLR();
018E 98AD CBI 0x15,5
(0449) }
(0450) //CLK1=1;
(0451) CLK1_SET();
018F 9AAB SBI 0x15,3
(0452) DATA_BUF=DATA_BUF<<1;
0190 90200096 LDS R2,DATA_BUF
0192 0C22 LSL R2
0193 92200096 STS DATA_BUF,R2
(0453) //CLK1=0;
(0454) CLK1_CLR();
0195 98AB CBI 0x15,3
0196 9543 INC R20
0197 3048 CPI R20,0x8
0198 F378 BCS 0x0188
0199 940E03FF CALL pop_gset1
019B 9508 RET
_Config2401:
variablel --> R20
i --> R22
019C 940E03FA CALL push_gset2
(0455) }
(0456) }
(0457)
(0458) /* <2401 配置寄存器的写入方式>
(0459) NOTE.
(0460) On the falling edge of CS, the nRF2401A updates the number of bits actually shifted
(0461) in during the last configuration.
(0462) Ex:
(0463) If the nRF2401A is to be configured for 2 channel RX in ShockBurst., a total of 120
(0464) bits must be shifted in during the first configuration after VDD is applied.
(0465) Once the wanted protocol, modus and RF channel are set, only one bit (RXEN) is
(0466) shifted in to switch between RX and TX.
(0467) 注意 :2401 配置寄存器的数据写入通过一移位寄存器完成
(0468) */
(0469) void Config2401(void)
(0470) {
(0471) unsigned int i;
(0472) unsigned char variablel;
(0473) //CS=0;
(0474) //CE=0;
(0475) //PWR_UP=1; //上电
(0476) NRF_DDR|=((1<<CS)|(1<<CE)|(1<<PWR_UP));
019E B384 IN R24,0x14
019F 6183 ORI R24,0x13
01A0 BB84 OUT 0x14,R24
(0477) CS_CLR();
01A1 98AC CBI 0x15,4
(0478) CE_CLR();
01A2 98A9 CBI 0x15,1
(0479) PWR_UP_CLR();
01A3 98A8 CBI 0x15,0
(0480) //for (i=0;i<10;i++) Delay100();//从上电到进入配置模式需要3ms 的延时
(0481) delay_nms(6);
01A4 E006 LDI R16,6
01A5 E010 LDI R17,0
01A6 DFAA RCALL _delay_nms
(0482) //CS=1; //使RF2401 进入配置方式
(0483) CS_SET();
01A7 9AAC SBI 0x15,4
(0484) for (i=0;i<18;i++)
01A8 2766 CLR R22
01A9 2777 CLR R23
01AA C00A RJMP 0x01B5
(0485) {
(0486) variablel=nRF2401_Conf[i];
01AB E680 LDI R24,0x60
01AC E090 LDI R25,0
01AD 01FB MOVW R30,R22
01AE 0FE8 ADD R30,R24
01AF 1FF9 ADC R31,R25
01B0 8140 LDD R20,Z+0
(0487) ByteWrite(variablel);
01B1 2F04 MOV R16,R20
01B2 DFCC RCALL _ByteWrite
01B3 5F6F SUBI R22,0xFF
01B4 4F7F SBCI R23,0xFF
01B5 3162 CPI R22,0x12
01B6 E0E0 LDI R30,0
01B7 077E CPC R23,R30
01B8 F390 BCS 0x01AB
(0488) }
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