📄 pcm.c
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/********************************************************************************
*
* Project Name : S3C6400 Validation
*
* Copyright 2006 by Samsung Electronics, Inc.
* All rights reserved.
*
* Project Description :
* This software is only for verifying functions of the S3C6400.
* Anybody can use this software without our permission.
*
*--------------------------------------------------------------------------------
*
* File Name : PCM_test.c
*
* File Description :
*
* Author : Yoh-Han Lee
* Dept. : AP Development Team
* Created Date : 2007/03/16
* Version : 0.2
*
* History
* - Version 0.1 (2007/03/16)
* -> Available with AK2440 PCM Codec.
* - Version 0.2 (2007/04/
* -> Available with
*********************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include "def.h"
#include "option.h"
#include "library.h"
#include "sfr6400.h"
#include "system.h"
#include "sysc.h"
#include "intc.h"
#include "gpio.h"
#include "iic.h"
#include "dma.h"
#include "ac97.h"
#include "pcm.h"
static DMAC oPcmDma;
static u16 uPcmRecDone;
static u16 uPcmPlayDone;
static volatile u16 * uPcmRecBuffer;
static volatile u16 * uPcmEndRecBuffer;
PCM oPcm;
void PCM_SetPort(PCM_PORT ePort)
{
if (ePort == PCM_PORT0)
{
//Set GPD: PCM Port
GPIO_SetFunctionAll(eGPIO_D, 0x22222, 0);
GPIO_SetPullUpDownAll(eGPIO_D, 0x0);
}
else if (ePort == PCM_PORT1)
{
//Set GPE: PCM Port
GPIO_SetFunctionAll(eGPIO_E, 0x22222, 0);
GPIO_SetPullUpDownAll(eGPIO_E, 0x0);
}
Delay(1000);
#if (PCM_CODEC_NAME== AK2430 || PCM_CODEC_NAME== WM8753)
GPIO_SetFunctionEach(eGPIO_B,eGPIO_5,2);
GPIO_SetFunctionEach(eGPIO_B,eGPIO_6,2);
GPIO_SetPullUpDownEach(eGPIO_B,eGPIO_5,2);
GPIO_SetPullUpDownEach(eGPIO_B,eGPIO_6,2);
#endif
}
void PCM_CodecInitPCMOut(PCM_SCLK ePcmSclk)
{
#if (PCM_CODEC_NAME== AK2430)
u8 uCodecSet;
if(ePcmSclk == SCLK_128K)
uCodecSet = 0x0;
else if(ePcmSclk == SCLK_256K)
uCodecSet = 0x1;
else if(ePcmSclk == SCLK_512K)
uCodecSet = 0x2;
PCM_CODEC_IICWrite(0x9e, 0x18, 0x07); //MSTCLK_I = 19.2MHz
if(PCMCLKSOURCE ==PCMCLKSOURCE_PCMCDCLK)
PCM_CODEC_IICWrite(0x9e, 0x1B, 0x0); //PCM Codec Master Mode
else
PCM_CODEC_IICWrite(0x9e, 0x1B, 0x6); //PCM Codec Slave Mode
PCM_CODEC_IICWrite(0x9e, 0x1E, uCodecSet); //DLCK = 128K,256kHz, or 512K, 14bit linear code (2's complement format)
PCM_CODEC_IICWrite(0x9e, 0x0C, 0x00); //0 dB
PCM_CODEC_IICWrite(0x9e, 0x10, 0x1F); //three dB
PCM_CODEC_IICWrite(0x9e, 0x11, 0x1F); //three dB
PCM_CODEC_IICWrite(0x9e, 0x06, 0x40); //POP Mute Off
PCM_CODEC_IICWrite(0x9e, 0x03, 0x01); //CKI Buff On other blocks Off
Delay(1);
PCM_CODEC_IICWrite(0x9e, 0x03, 0x09); //PLL2, CKI Buff On and other blocks Off
Delay(300);
PCM_CODEC_IICWrite(0x9e, 0x04, 0x01); //RXSUM On and other blocks Off
PCM_CODEC_IICWrite(0x9e, 0x05, 0x20); //PCM Codec On and other blocks Off
Delay(50);
PCM_CODEC_IICWrite(0x9e, 0x07, 0x20); //sw_COL Close and other sw Open
PCM_CODEC_IICWrite(0x9e, 0x08, 0x20); //sw_COR Close and othr sw Open
PCM_CODEC_IICWrite(0x9e, 0x09, 0x14); //sw_EPL, sw_EPR Amp output
PCM_CODEC_IICWrite(0x9e, 0x04, 0x31); //EPL/R Amp(RXSUM) On and other blocks Off
Delay(1600);
#elif (PCM_CODEC_NAME == WM9713)
if(AC97_Init())
{
AC97_CodecCmd(WRITE,0x26, 0x4f00); // Enable PR5(Internal Clock, AC-link I/F)
AC97_CodecCmd(WRITE,0x26, 0x4700); // Enable PR3(VREF, I/P PGA's, DAC's, ADC's, Mixer, O/P's)
AC97_CodecCmd(WRITE,0x3C, 0xfbff); // Enable MBIAS generator
Delay(1000);
AC97_CodecCmd(WRITE,0x26, 0x4300); // Enable I/P PGA's nad Mixers
AC97_CodecCmd(WRITE,0x3C, 0xebf3); // Enable VXDAC, L/R HP
AC97_CodecCmd(WRITE,0x26, 0x4100); // Enable DAC
AC97_CodecCmd(WRITE,0x26, 0x0100); // Enable PR6 (O/P PGA's)
AC97_CodecCmd(WRITE,0x3E, 0xf9ff); // Enable HPL/R output PGA's
AC97_CodecCmd(WRITE,0x1C, 0x00a0); // HPL/R PGA input select: HPMIXL/R
AC97_CodecCmd(WRITE,0x04, 0x8a8a); // Set HL/R Volume = -6dB
AC97_CodecCmd(WRITE,0x2A,0x1); //Variable Rate Enable
Disp("VRA Enable(1)/Disable(0): 0x%x\n",(0x1&AC97_CodecCmd(READ,0x2A,0x0001)));
AC97_CodecCmd(WRITE,0x2E, 0x1f40); // AUXDAC = 8kHz
AC97_CodecCmd(WRITE,0x18, 0x02aa); // Unmute VXDAC to HPMIXL/R
AC97_CodecCmd(WRITE,0x04, 0x0a80); // Unmute HPL/R
AC97_CodecCmd(WRITE,0x36, 0xa6a3); // PCM IF=DSP A type, 16Bit, Slave Mode, Fs=8kHz
AC97_CodecCmd(WRITE,0x44, 0x0b80); // PCM CLK = 8kHz
AC97_CodecCmd(WRITE,0x4C, 0xffde); // GPIO config. For PCM IF (Slave mode)
}
#elif (PCM_CODEC_NAME == WM8753 )
PCM_CODEC_IICWrite(0x34, 0x3e, 0x00); //Reset
PCM_CODEC_IICWrite(0x34, 0x28, 0xd0); //PWR Management(1) << Power up VMID[50Kohm]; VREF; VDAC >>
PCM_CODEC_IICWrite(0x34, 0x2e, 0x03); //PWR Management(4) << Power up L/RMIX >>
Delay(1000);
PCM_CODEC_IICWrite(0x34, 0x02, 0x08); //DAC Control Mute
PCM_CODEC_IICWrite(0x34, 0x04, 0x00); //ADC Control
PCM_CODEC_IICWrite(0x34, 0x07, 0xa3); //PCM Audio I/F
PCM_CODEC_IICWrite(0x34, 0x08, 0x0a); //HiFi Audio I/F
PCM_CODEC_IICWrite(0x34, 0x0a, 0x33); //Interface Control << Voice Codec >>
PCM_CODEC_IICWrite(0x34, 0x0c, 0x34); //Sample Rate Control (1)
PCM_CODEC_IICWrite(0x34, 0x0e, 0x97); //Sample Rate Control (2), Don't care in case of slave mode
PCM_CODEC_IICWrite(0x34, 0x10, 0xff); //Left DAC Volume
PCM_CODEC_IICWrite(0x34, 0x12, 0xff); //Right DAC Volume
PCM_CODEC_IICWrite(0x34, 0x14, 0x0f); //Bass Control
PCM_CODEC_IICWrite(0x34, 0x16, 0x0f); //Treble Control
PCM_CODEC_IICWrite(0x34, 0x18, 0x7b); //ALC 1
PCM_CODEC_IICWrite(0x34, 0x1a, 0x00); //ALC 2
PCM_CODEC_IICWrite(0x34, 0x1c, 0x32); //ALC 3
PCM_CODEC_IICWrite(0x34, 0x1e, 0x00); //Noise Gate
PCM_CODEC_IICWrite(0x34, 0x21, 0xc3); //Left ADC Volume
PCM_CODEC_IICWrite(0x34, 0x23, 0xc3); //Right ADC Volume
PCM_CODEC_IICWrite(0x34, 0x24, 0xc0); //Additional Control
PCM_CODEC_IICWrite(0x34, 0x26, 0x00); //Three D Control
PCM_CODEC_IICWrite(0x34, 0x2a, 0x00); //Power Management(2)
PCM_CODEC_IICWrite(0x34, 0x30, 0x00); //ID Register
PCM_CODEC_IICWrite(0x34, 0x32, 0x00); //Int. Polarty
PCM_CODEC_IICWrite(0x34, 0x34, 0x00); //Int. Enable
PCM_CODEC_IICWrite(0x34, 0x36, 0x00); //GPIO Control (1)
PCM_CODEC_IICWrite(0x34, 0x38, 0x00); //GPIO Control (2)
PCM_CODEC_IICWrite(0x34, 0x40, 0x55); //Record Mix (1)
PCM_CODEC_IICWrite(0x34, 0x42, 0x05); //Record Mix (2)
PCM_CODEC_IICWrite(0x34, 0x44, 0x50); //Left Out Mix(1)
PCM_CODEC_IICWrite(0x34, 0x47, 0x55); //Left Out Mix(2) << Set the VXD2LO bit (Voice DAC to Left Output >>
PCM_CODEC_IICWrite(0x34, 0x48, 0x50); //Rigth Out Mix(1)
PCM_CODEC_IICWrite(0x34, 0x4b, 0x55); //Right Out Mix(2) << Set the VXD2RO bit (Voice DAC to Right Output) >>
PCM_CODEC_IICWrite(0x34, 0x4c, 0x50); //Mono Out Mix(1)
PCM_CODEC_IICWrite(0x34, 0x4e, 0x55); //Mono Out Mix(2)
PCM_CODEC_IICWrite(0x34, 0x51, 0x79); //LOUT1 Volume << Set Left OUtput 1 Volume Update bit to '1' & Volume Level to Default >>
PCM_CODEC_IICWrite(0x34, 0x53, 0x79); //ROUT1 Volume << Set Right OUtput 1 Volume Update bit to '1' & Volume Level to Default >>
PCM_CODEC_IICWrite(0x34, 0x54, 0x79); //LOUT2 Volume
PCM_CODEC_IICWrite(0x34, 0x56, 0x79); //ROUT2 Volume
PCM_CODEC_IICWrite(0x34, 0x58, 0x79); //MONO Out
PCM_CODEC_IICWrite(0x34, 0x5a, 0x00); //Output Control
PCM_CODEC_IICWrite(0x34, 0x5c, 0x00); //ADC Input Mode
PCM_CODEC_IICWrite(0x34, 0x5e, 0x00); //Input Control (1)
PCM_CODEC_IICWrite(0x34, 0x60, 0x00); //Input Control (2)
PCM_CODEC_IICWrite(0x34, 0x62, 0x97); //Left Input Volume
PCM_CODEC_IICWrite(0x34, 0x64, 0x97); //Right Input Volume
PCM_CODEC_IICWrite(0x34, 0x66, 0x00); //MIC Bias Comp Control
PCM_CODEC_IICWrite(0x34, 0x68, 0x04); //Clock Control << Clock for Voice Codec = MCLK or PLL1
PCM_CODEC_IICWrite(0x34, 0x6a, 0x00); //PLL1 Control (1)
PCM_CODEC_IICWrite(0x34, 0x6c, 0x83); //PLL1 Control (2)
PCM_CODEC_IICWrite(0x34, 0x6e, 0x24); //PLL1 Control (3)
PCM_CODEC_IICWrite(0x34, 0x71, 0xba); //PLL1 Control (4)
PCM_CODEC_IICWrite(0x34, 0x72, 0x00); //PLL2 Control (1)
PCM_CODEC_IICWrite(0x34, 0x74, 0x83); //PLL2 Control (2)
PCM_CODEC_IICWrite(0x34, 0x76, 0x24); //PLL2 Control (3)
PCM_CODEC_IICWrite(0x34, 0x79, 0xba); //PLL2 Control (4)
PCM_CODEC_IICWrite(0x34, 0x7a, 0x00); //Bias Control
PCM_CODEC_IICWrite(0x34, 0x7e, 0x00); //Additional Control
PCM_CODEC_IICWrite(0x34, 0x2d, 0x80); //Power Management(3) <<Power up L/ROUT1 outputs >>
#endif
}
void PCM_CodecExitPCMOut(void)
{
#if (PCM_CODEC_NAME== AK2430)
PCM_CODEC_IICWrite(0x9e, 0x04, 0x01); //EPL/R Amp Off
Delay(1300);
PCM_CODEC_IICWrite(0x9e, 0x07, 0x00); //sw_COL Close and other sw Open
PCM_CODEC_IICWrite(0x9e, 0x08, 0x00); //sw_COR Close and othr sw Open
PCM_CODEC_IICWrite(0x9e, 0x09, 0x00); //sw_EPL, sw_EPR Amp output
PCM_CODEC_IICWrite(0x9e, 0x04, 0x00); //RXSUM Off
PCM_CODEC_IICWrite(0x9e, 0x05, 0x00); //PCM Codec Off
#elif (PCM_CODEC_NAME== WM9713)
AC97_CodecCmd(WRITE,0x3E, 0xffff); //Disable HPL/R output PGA's
AC97_CodecCmd(WRITE,0x26, 0xff00); //Disable I/P PGA's nad Mixers
#endif
}
void PCM_CodecInitPCMIn(PCM_SCLK ePcmSclk)
{
#if (PCM_CODEC_NAME== AK2430)
u8 uCodecSet;
if(ePcmSclk == SCLK_128K)
uCodecSet = 0x0;
else if(ePcmSclk == SCLK_256K)
uCodecSet = 0x1;
else if(ePcmSclk == SCLK_512K)
uCodecSet = 0x2;
PCM_CODEC_IICWrite(0x9e, 0x18, 0x07); //MSTCLK_I = 19.2MHz
if(PCMCLKSOURCE ==PCMCLKSOURCE_PCMCDCLK)
PCM_CODEC_IICWrite(0x9e, 0x1B, 0x0); //PCM Codec Master Mode
else
PCM_CODEC_IICWrite(0x9e, 0x1B, 0x6); //PCM Codec Slave Mode
PCM_CODEC_IICWrite(0x9e, 0x1E, uCodecSet); //DLCK = 128K,256kHz, or 512K, 14bit linear code (2's complement format)
PCM_CODEC_IICWrite(0x9e, 0x0D, 0x5); //0 dB
PCM_CODEC_IICWrite(0x9e, 0x06, 0x40); //POP Mute Off
PCM_CODEC_IICWrite(0x9e, 0x03, 0x01); //CKI Buff On other blocks Off
Delay(1);
PCM_CODEC_IICWrite(0x9e, 0x03, 0x09); //PLL2, CKI Buff On and other blocks Off
Delay(300);
PCM_CODEC_IICWrite(0x9e, 0x05, 0x10); //TXSUM On and other blocks Off
PCM_CODEC_IICWrite(0x9e, 0x05, 0x30); //PCM Codec, TX Sum On and other blocks Off
Delay(50);
PCM_CODEC_IICWrite(0x9e, 0x0B, 0x11); //sw_COI, sw_TX1 Close and other sw Open
PCM_CODEC_IICWrite(0x9e, 0x05, 0x35); //MIC AMP1, MIC BIAS1, PCM CODEC, TX SUM On and other bolcks OFF
Delay(1600);
#elif (PCM_CODEC_NAME== WM9713)
if(AC97_Init())
{
AC97_CodecCmd(WRITE,0x26, 0x4f00); // Enable PR5(Internal Clock, AC-link I/F)
AC97_CodecCmd(WRITE,0x26, 0x4700); // Enable PR3(VREF, I/P PGA's, DAC's, ADC's, Mixer, O/P's)
AC97_CodecCmd(WRITE,0x3C, 0xfbff); // Enable MBIAS generator
Delay(1000);
AC97_CodecCmd(WRITE,0x26, 0x4300); // Enable I/P PGA's nad Mixers
AC97_CodecCmd(WRITE,0x3C, 0xfbdf); // Enable ADC L
AC97_CodecCmd(WRITE,0x26, 0x4200); // Enable Stereo ADC
AC97_CodecCmd(WRITE,0x26, 0x0200); // Enable PR6 (O/P PGA's)
AC97_CodecCmd(WRITE,0x3E, 0xffbf); // Enable LINE L PGA
AC97_CodecCmd(WRITE,0x2A,0x1); //Variable Rate Enable
Disp("VRA Enable(1)/Disable(0): 0x%x\n",(0x1&AC97_CodecCmd(READ,0x2A,0x0001)));
AC97_CodecCmd(WRITE,0x32, 0x1f40); // ADC SR = 8kHz
AC97_CodecCmd(WRITE,0x14, 0xfe52); // Record Mux Source Selection: LINE L/R
//AC97_CodecCmd(WRITE,0x62, 0xbf80); // ALC On
//AC97_CodecCmd(WRITE,0x5A, 0x0030); // HPF Corner Freq.
//AC97_CodecCmd(WRITE,0x5C, 0x000c); // ADC High-Pass Filter On
AC97_CodecCmd(WRITE,0x12, 0x0000); // Unmute ADC and Set ADC Recoding Volume
AC97_CodecCmd(WRITE,0x36, 0xa6a3); // PCM IF=DSP A type, 16Bit, Slave Mode, Fs=8kHz
AC97_CodecCmd(WRITE,0x44, 0x0b80); // PCM CLK = 8kHz
AC97_CodecCmd(WRITE,0x4C, 0xffde); // GPIO config. For PCM IF (Slave mode)
}
#elif (PCM_CODEC_NAME == WM8753 )
PCM_CODEC_IICWrite(0x34, 0x3e, 0x00); //Reset
PCM_CODEC_IICWrite(0x34, 0x02, 0x08); //DAC Control Mute
PCM_CODEC_IICWrite(0x34, 0x04, 0x00); //ADC Control
PCM_CODEC_IICWrite(0x34, 0x07, 0xa3); //PCM Audio I/F
PCM_CODEC_IICWrite(0x34, 0x08, 0x0a); //HiFi Audio I/F
PCM_CODEC_IICWrite(0x34, 0x0a, 0x00); //Interface Control << Voice Codec >>
PCM_CODEC_IICWrite(0x34, 0x0c, 0x34); //Sample Rate Control (1)
PCM_CODEC_IICWrite(0x34, 0x0e, 0x97); //Sample Rate Control (2), Don't care in case of slave mode
PCM_CODEC_IICWrite(0x34, 0x10, 0xff); //Left DAC Volume
PCM_CODEC_IICWrite(0x34, 0x12, 0xff); //Right DAC Volume
PCM_CODEC_IICWrite(0x34, 0x18, 0x7b); //ALC 1
PCM_CODEC_IICWrite(0x34, 0x1a, 0x00); //ALC 2
PCM_CODEC_IICWrite(0x34, 0x1c, 0x32); //ALC 3
PCM_CODEC_IICWrite(0x34, 0x1e, 0x00); //Noise Gate
PCM_CODEC_IICWrite(0x34, 0x21, 0xc3); //Left ADC Volume
PCM_CODEC_IICWrite(0x34, 0x23, 0xc3); //Right ADC Volume
PCM_CODEC_IICWrite(0x34, 0x24, 0xc0); //Additional Control
PCM_CODEC_IICWrite(0x34, 0x26, 0x00); //Three D Control
PCM_CODEC_IICWrite(0x34, 0x28, 0xc0); //Power Management(1) << Power up VMID[50K ohm]; VREF >>
PCM_CODEC_IICWrite(0x34, 0x2a, 0x0c); //Power Management(2) << Power up ADCL/R >>
PCM_CODEC_IICWrite(0x34, 0x2c, 0x00); //Power Management(3)
PCM_CODEC_IICWrite(0x34, 0x2e, 0x00); //Power Management(4)
PCM_CODEC_IICWrite(0x34, 0x30, 0x00); //ID Register
PCM_CODEC_IICWrite(0x34, 0x32, 0x00); //Int. Polarty
PCM_CODEC_IICWrite(0x34, 0x34, 0x00); //Int. Enable
PCM_CODEC_IICWrite(0x34, 0x36, 0x00); //GPIO Control (1)
PCM_CODEC_IICWrite(0x34, 0x38, 0x00); //GPIO Control (2)
PCM_CODEC_IICWrite(0x34, 0x40, 0x55); //Record Mix (1)
PCM_CODEC_IICWrite(0x34, 0x42, 0x05); //Record Mix (2)
PCM_CODEC_IICWrite(0x34, 0x44, 0x50); //Left Out Mix(1)
PCM_CODEC_IICWrite(0x34, 0x46, 0x55); //Left Out Mix(2)
PCM_CODEC_IICWrite(0x34, 0x48, 0x50); //Rigth Out Mix(1)
PCM_CODEC_IICWrite(0x34, 0x4a, 0x55); //Right Out Mix(2)
PCM_CODEC_IICWrite(0x34, 0x4c, 0x50); //Mono Out Mix(1)
PCM_CODEC_IICWrite(0x34, 0x4e, 0x55); //Mono Out Mix(2)
PCM_CODEC_IICWrite(0x34, 0x50, 0x79); //LOUT1 Volume
PCM_CODEC_IICWrite(0x34, 0x52, 0x79); //ROUT1 Volume
PCM_CODEC_IICWrite(0x34, 0x54, 0x79); //LOUT2 Volume
PCM_CODEC_IICWrite(0x34, 0x56, 0x79); //ROUT2 Volume
PCM_CODEC_IICWrite(0x34, 0x58, 0x79); //MONO Out
PCM_CODEC_IICWrite(0x34, 0x5a, 0x00); //Output Control
PCM_CODEC_IICWrite(0x34, 0x5c, 0x05); //ADC Input Mode << Set L/R ADC input select to Line 1/2 '01' >>
PCM_CODEC_IICWrite(0x34, 0x5e, 0x00); //Input Control (1)
PCM_CODEC_IICWrite(0x34, 0x60, 0x00); //Input Control (2)
PCM_CODEC_IICWrite(0x34, 0x62, 0x97); //Left Input Volume
PCM_CODEC_IICWrite(0x34, 0x64, 0x97); //Right Input Volume
PCM_CODEC_IICWrite(0x34, 0x66, 0x00); //MIC Bias Comp Control
PCM_CODEC_IICWrite(0x34, 0x68, 0x04); //Clock Control << Clock for Voice Codec = MCLK or PLL1
PCM_CODEC_IICWrite(0x34, 0x6a, 0x00); //PLL1 Control (1)
PCM_CODEC_IICWrite(0x34, 0x6c, 0x83); //PLL1 Control (2)
PCM_CODEC_IICWrite(0x34, 0x6e, 0x24); //PLL1 Control (3)
PCM_CODEC_IICWrite(0x34, 0x71, 0xba); //PLL1 Control (4)
PCM_CODEC_IICWrite(0x34, 0x72, 0x00); //PLL2 Control (1)
PCM_CODEC_IICWrite(0x34, 0x74, 0x83); //PLL2 Control (2)
PCM_CODEC_IICWrite(0x34, 0x76, 0x24); //PLL2 Control (3)
PCM_CODEC_IICWrite(0x34, 0x79, 0xba); //PLL2 Control (4)
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