📄 count.rpt
字号:
- 5 - C 02 OR2 s 0 4 0 1 ~1445~1
- 5 - C 05 OR2 0 4 0 1 :1462
- 2 - C 05 OR2 0 3 0 1 :1475
- 4 - C 05 AND2 0 3 0 1 :1476
- 8 - C 17 OR2 ! 0 4 0 5 :1502
- 5 - C 17 OR2 0 4 0 1 :1597
- 5 - C 03 OR2 0 3 0 1 :1603
- 1 - C 20 AND2 s 0 2 0 1 ~1635~1
- 7 - C 20 OR2 0 4 0 1 :1635
- 8 - C 20 OR2 0 3 0 1 :1636
- 7 - C 17 OR2 0 3 0 1 :1652
- 7 - C 03 OR2 0 4 0 1 :1658
- 4 - C 04 OR2 0 4 0 1 :1664
- 2 - C 04 AND2 s 0 2 0 1 ~1666~1
- 1 - C 01 OR2 s 0 3 0 1 ~1743~1
- 3 - C 04 AND2 0 3 1 0 :1898
- 1 - C 04 AND2 0 3 1 0 :1906
- 6 - C 12 OR2 0 3 1 0 :1967
- 8 - C 05 OR2 0 3 1 1 :2021
- 7 - C 04 OR2 ! 0 3 1 0 :2073
- 8 - C 04 OR2 0 3 1 0 :2129
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: c:\rgy\count.rpt
count
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 2/ 48( 4%) 0/ 48( 0%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
B: 0/ 96( 0%) 1/ 48( 2%) 0/ 48( 0%) 0/16( 0%) 1/16( 6%) 0/16( 0%)
C: 9/ 96( 9%) 13/ 48( 27%) 6/ 48( 12%) 0/16( 0%) 9/16( 56%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
02: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
03: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
04: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: c:\rgy\count.rpt
count
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 17 clk
Device-Specific Information: c:\rgy\count.rpt
count
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 17 ini
Device-Specific Information: c:\rgy\count.rpt
count
** EQUATIONS **
clk : INPUT;
en : INPUT;
ini : INPUT;
-- Node name is 'ag0'
-- Equation name is 'ag0', type is output
ag0 = _LC3_C12;
-- Node name is 'al0'
-- Equation name is 'al0', type is output
al0 = _LC5_C4;
-- Node name is 'ar0'
-- Equation name is 'ar0', type is output
ar0 = _LC6_C12;
-- Node name is 'ay0'
-- Equation name is 'ay0', type is output
ay0 = _LC8_C5;
-- Node name is 'bg0'
-- Equation name is 'bg0', type is output
bg0 = _LC3_C4;
-- Node name is 'bl0'
-- Equation name is 'bl0', type is output
bl0 = _LC1_C4;
-- Node name is 'br0'
-- Equation name is 'br0', type is output
br0 = _LC7_C4;
-- Node name is 'by0'
-- Equation name is 'by0', type is output
by0 = _LC8_C4;
-- Node name is 'en~1'
-- Equation name is 'en~1', location is LC4_C3, type is buried.
-- synthesized logic cell
!_LC4_C3 = _LC4_C3~NOT;
_LC4_C3~NOT = LCELL( _EQ001);
_EQ001 = en
# !_LC4_C2 & !_LC4_C17;
-- Node name is ':56' = 's0'
-- Equation name is 's0', location is LC3_C3, type is buried.
s0 = DFFE( _EQ002, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ002 = !_LC4_C2 & !_LC4_C17 & s0
# !en & _LC4_C17 & !s0
# !en & _LC4_C2 & !s0
# en & s0;
-- Node name is ':55' = 's1'
-- Equation name is 's1', location is LC6_C3, type is buried.
s1 = DFFE( _EQ003, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ003 = _LC4_C3 & s0 & !s1
# !s0 & s1
# !_LC4_C3 & s1;
-- Node name is ':54' = 's2'
-- Equation name is 's2', location is LC8_C3, type is buried.
s2 = DFFE( _EQ004, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ004 = !s0 & s2
# !s1 & s2
# !_LC4_C3 & s2
# _LC4_C3 & s0 & s1 & !s2;
-- Node name is 'tah4'
-- Equation name is 'tah4', type is output
tah4 = _LC3_C5;
-- Node name is 'tah5'
-- Equation name is 'tah5', type is output
tah5 = _LC1_C5;
-- Node name is 'tah6'
-- Equation name is 'tah6', type is output
tah6 = _LC2_C20;
-- Node name is 'tal0'
-- Equation name is 'tal0', type is output
tal0 = _LC7_C1;
-- Node name is 'tal1'
-- Equation name is 'tal1', type is output
tal1 = _LC8_C1;
-- Node name is 'tal2'
-- Equation name is 'tal2', type is output
tal2 = _LC8_C2;
-- Node name is 'tal3'
-- Equation name is 'tal3', type is output
tal3 = _LC2_C2;
-- Node name is 'tbh4'
-- Equation name is 'tbh4', type is output
tbh4 = _LC6_C4;
-- Node name is 'tbh5'
-- Equation name is 'tbh5', type is output
tbh5 = _LC1_C3;
-- Node name is 'tbh6'
-- Equation name is 'tbh6', type is output
tbh6 = _LC6_C17;
-- Node name is 'tbl0'
-- Equation name is 'tbl0', type is output
tbl0 = _LC6_C20;
-- Node name is 'tbl1'
-- Equation name is 'tbl1', type is output
tbl1 = _LC5_C20;
-- Node name is 'tbl2'
-- Equation name is 'tbl2', type is output
tbl2 = _LC3_C20;
-- Node name is 'tbl3'
-- Equation name is 'tbl3', type is output
tbl3 = _LC1_C17;
-- Node name is '|LPM_ADD_SUB:1356|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC7_C2', type is buried
_LC7_C2 = LCELL( _EQ005);
_EQ005 = _LC8_C1
# _LC7_C1
# _LC8_C2;
-- Node name is '|LPM_ADD_SUB:1546|addcore:adder|pcarry1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC4_C20', type is buried
_LC4_C20 = LCELL( _EQ006);
_EQ006 = _LC5_C20
# _LC6_C20;
-- Node name is '|LPM_ADD_SUB:1546|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC3_C17', type is buried
_LC3_C17 = LCELL( _EQ007);
_EQ007 = _LC5_C20
# _LC6_C20
# _LC3_C20;
-- Node name is ':12'
-- Equation name is '_LC2_C20', type is buried
_LC2_C20 = DFFE( _EQ008, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ008 = !en & _LC5_C5
# en & _LC2_C20;
-- Node name is ':14'
-- Equation name is '_LC1_C5', type is buried
_LC1_C5 = DFFE( _EQ009, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ009 = !en & !_LC4_C2 & _LC6_C5
# en & _LC1_C5;
-- Node name is ':16'
-- Equation name is '_LC3_C5', type is buried
_LC3_C5 = DFFE( _EQ010, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ010 = !en & _LC2_C5
# !en & _LC4_C5
# en & _LC3_C5;
-- Node name is ':18'
-- Equation name is '_LC2_C2', type is buried
_LC2_C2 = DFFE( _EQ011, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ011 = !en & !_LC2_C2 & !_LC4_C2 & !_LC7_C2
# _LC2_C2 & !_LC4_C2 & _LC7_C2
# en & _LC2_C2;
-- Node name is ':20'
-- Equation name is '_LC8_C2', type is buried
_LC8_C2 = DFFE( _EQ012, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ012 = !en & _LC6_C2
# en & _LC8_C2;
-- Node name is ':22'
-- Equation name is '_LC8_C1', type is buried
_LC8_C1 = DFFE( _EQ013, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ013 = !en & _LC1_C1 & !_LC4_C2
# en & _LC8_C1;
-- Node name is ':24'
-- Equation name is '_LC7_C1', type is buried
!_LC7_C1 = _LC7_C1~NOT;
_LC7_C1~NOT = DFFE( _EQ014, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ014 = en & !_LC7_C1
# !en & _LC1_C12 & _LC7_C1
# !en & !_LC4_C2 & _LC7_C1;
-- Node name is ':26'
-- Equation name is '_LC6_C17', type is buried
_LC6_C17 = DFFE( _EQ015, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ015 = !en & _LC7_C17
# en & _LC6_C17;
-- Node name is ':28'
-- Equation name is '_LC1_C3', type is buried
_LC1_C3 = DFFE( _EQ016, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ016 = !en & _LC7_C3
# en & _LC1_C3;
-- Node name is ':30'
-- Equation name is '_LC6_C4', type is buried
_LC6_C4 = DFFE( _EQ017, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ017 = !en & _LC4_C4
# en & _LC6_C4;
-- Node name is ':32'
-- Equation name is '_LC1_C17', type is buried
_LC1_C17 = DFFE( _EQ018, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ018 = !en & !_LC1_C17 & !_LC3_C17 & !_LC4_C17
# _LC1_C17 & _LC3_C17 & !_LC4_C17
# en & _LC1_C17;
-- Node name is ':34'
-- Equation name is '_LC3_C20', type is buried
_LC3_C20 = DFFE( _EQ019, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ019 = !en & _LC7_C20
# !en & _LC8_C20
# en & _LC3_C20;
-- Node name is ':36'
-- Equation name is '_LC5_C20', type is buried
_LC5_C20 = DFFE( _EQ020, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
_EQ020 = _LC1_C20 & _LC5_C20 & _LC6_C20
# !en & _LC1_C20 & !_LC5_C20 & !_LC6_C20
# en & _LC5_C20;
-- Node name is ':38'
-- Equation name is '_LC6_C20', type is buried
!_LC6_C20 = _LC6_C20~NOT;
_LC6_C20~NOT = DFFE( _EQ021, GLOBAL( clk), GLOBAL(!ini), VCC, VCC);
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