timer80.asm

小日本NECMCU的一个timer的例程,呵呵,我写的小日本,居然翻译为Little Japan ,爽!!

; 78K/0S Series C Compiler V1.50 Assembler Source
;                                                Date:10 Sep 2008 Time:10:39:27

; Command   : -ftimer80.pcc
; In-file   : timer80.c
; Asm-file  : timer80.asm
; Para-file : -cF9222
;             -yC:\NECTools32\DEV\
;             -a
;             -zp
;             timer80.c

$PROCESSOR(F9222)
$DEBUG
$NODEBUGA
$KANJICODE SJIS
$TOL_INF	03FH, 0150H, 02H, 00H

$DGS	FIL_NAM, .file,		047H,	0FFFEH,	03FH,	067H,	01H,	00H
$DGS	AUX_FIL, timer80.c
$DGS	MOD_NAM, timer80,	00H,	0FFFEH,	00H,	077H,	00H,	00H
$DGS	SEC_NAM, @@BITS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CNST,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATA,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@R_INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@INIS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@DATS,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CALT,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@CODE,	U,	U,	00H,	078H,	00H,	00H
$DGS	SEC_NAM, @@VECT1A,	U,	U,	00H,	078H,	00H,	00H
$DGS	GLV_SYM, _PORT_Init,	U,	U,	08001H,	020H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	014H,	00H
$DGS	BEG_FUN, ??bf_PORT_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 017H,		00H,	014H
$DGS	END_FUN, ??ef_PORT_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 013H
$DGS	GLV_SYM, _CPU_Init,	U,	U,	08001H,	020H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	01AH,	00H
$DGS	BEG_FUN, ??bf_CPU_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 02BH,		00H,	01AH
$DGS	END_FUN, ??ef_CPU_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 0EH
$DGS	GLV_SYM, _Timer80_Init,	U,	U,	08001H,	020H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	020H,	00H
$DGS	BEG_FUN, ??bf_Timer80_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 03BH,		00H,	020H
$DGS	END_FUN, ??ef_Timer80_Init,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 09H
$DGS	GLV_SYM, _vect_INTTM80,	U,	U,	0E001H,	020H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	02AH,	00H
$DGS	BEG_FUN, ??bf_vect_INTTM80,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 058H,		04H,	024H
$DGS	BEG_BLK, ??bb00_vect_INTTM80,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 04H,		00H,	00H
$DGS	END_BLK, ??eb00_vect_INTTM80,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 07H
$DGS	END_FUN, ??ef_vect_INTTM80,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 09H
$DGS	GLV_SYM, _LED_flash,	U,	U,	08001H,	020H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	035H,	00H
$DGS	BEG_FUN, ??bf_LED_flash,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 06EH,		02H,	02FH
$DGS	FUN_ARG, _i,		00H,	0FFFFH,	0CH,	09H,	00H,	00H
$DGS	BEG_BLK, ??bb00_LED_flash,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 04H,		00H,	00H
$DGS	END_BLK, ??eb00_LED_flash,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 0FH
$DGS	END_FUN, ??ef_LED_flash,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 010H
$DGS	GLV_SYM, _main,		U,	U,	08001H,	020H,	01H,	02H
$DGS	AUX_FUN, 00H,		U,	U,	047H,	00H
$DGS	BEG_FUN, ??bf_main,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_BEG, 080H,		00H,	039H
$DGS	BEG_BLK, ??bb00_main,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 011H,		00H,	03BH
$DGS	BEG_BLK, ??bb01_main,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 014H,		00H,	03DH
$DGS	BEG_BLK, ??bb02_main,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_BEG, 01AH,		00H,	00H
$DGS	END_BLK, ??eb02_main,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 01CH
$DGS	END_BLK, ??eb01_main,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 01EH
$DGS	END_BLK, ??eb00_main,	U,	U,	00H,	064H,	01H,	00H
$DGS	AUX_END, 01FH
$DGS	END_FUN, ??ef_main,	U,	U,	00H,	065H,	01H,	00H
$DGS	AUX_END, 024H
$DGS	GLV_SYM, _Timer80Flag,	U,	U,	034CH,	020H,	00H,	00H
$DGS	GLV_SYM, _n,		U,	U,	0CH,	020H,	00H,	00H
$DGS	GLV_SYM, _m,		U,	U,	0CH,	020H,	00H,	00H
$DGS	GLV_SYM, _@vect1a,	U,	U,	00H,	020H,	00H,	00H

	PUBLIC	_vect_INTTM80
	PUBLIC	_Timer80Flag
	PUBLIC	_n
	PUBLIC	_m
	PUBLIC	_PORT_Init
	PUBLIC	_CPU_Init
	PUBLIC	_Timer80_Init
	PUBLIC	_LED_flash
	PUBLIC	_main
	PUBLIC	_@vect1a

@@BITS	BSEG
_Timer80Flag	DBIT

@@CNST	CSEG

@@R_INIT	CSEG

@@INIT	DSEG

@@DATA	DSEG
_n:	DS	(1)
_m:	DS	(1)

@@R_INIS	CSEG	UNITP

@@INIS	DSEG	SADDRP

@@DATS	DSEG	SADDRP

@@CALT	CSEG	CALLT0

; line    18
; line    19
; line    23

@@CODE	CSEG
_PORT_Init:
$DGL	1,14
??bf_PORT_Init:
; line    24
$DGL	0,2
	mov	PMC2,#00H	; 0 				;[INF] 3, 6
; line    25
$DGL	0,3
	mov	PM2,#0F0H	; 240 				;[INF] 3, 6
; line    26
$DGL	0,4
	mov	P2,#0FH	; 15 					;[INF] 3, 6
; line    28
$DGL	0,6
	clr1	PM4.2						;[INF] 3, 6
; line    29
$DGL	0,7
	clr1	P4.2						;[INF] 3, 6
; line    30
$DGL	0,8
	set1	PM4.1						;[INF] 3, 6
; line    32
$DGL	0,10
	clr1	PM4.5						;[INF] 3, 6
; line    33
$DGL	0,11
	set1	P4.5						;[INF] 3, 6
; line    34
$DGL	0,12
	clr1	PM4.4						;[INF] 3, 6
; line    35
$DGL	0,13
	set1	P4.4						;[INF] 3, 6
; line    37
$DGL	0,15
	clr1	PM12.3						;[INF] 3, 6
; line    38
$DGL	0,16
	set1	P12.3						;[INF] 3, 6
; line    39
$DGL	0,17
	set1	P13.0						;[INF] 3, 6
; line    41
$DGL	0,19
??ef_PORT_Init:
	ret							;[INF] 1, 6
??ee_PORT_Init:
; line    43
_CPU_Init:
$DGL	1,20
??bf_CPU_Init:
; line    46
$DGL	0,4
	mov	PCC,#00H	; 0 				;[INF] 3, 6
; line    47
$DGL	0,5
	mov	PPCC,#00H	; 0 				;[INF] 3, 6
; line    48
$DGL	0,6
	mov	LSRCM,#01H	; 1 				;[INF] 3, 6
; line    56
$DGL	0,14
??ef_CPU_Init:
	ret							;[INF] 1, 6
??ee_CPU_Init:
; line    59
_Timer80_Init:
$DGL	1,26
??bf_Timer80_Init:
; line    60
$DGL	0,2
	clr1	TMC80.7						;[INF] 3, 6
; line    61
$DGL	0,3
	mov	TMC80,#00H	; 0 				;[INF] 3, 6
; line    62
$DGL	0,4
	mov	CR80,#06H	; 6 				;[INF] 3, 6
; line    63
$DGL	0,5
	clr1	IF1.3						;[INF] 3, 6
; line    64
$DGL	0,6
	clr1	MK1.3						;[INF] 3, 6
; line    65
$DGL	0,7
	set1	TMC80.7						;[INF] 3, 6
; line    66
$DGL	0,8
	mov	TMC80,#086H	; 134 				;[INF] 3, 6
; line    67
$DGL	0,9
??ef_Timer80_Init:
	ret							;[INF] 1, 6
??ee_Timer80_Init:
; line    88
_vect_INTTM80:
$DGL	1,32
	push	ax						;[INF] 1, 4
	push	de						;[INF] 1, 4
??bf_vect_INTTM80:
; line    90
$DGL	0,3
	mov	a,#0AH	; 10 					;[INF] 3, 6
	cmp	a,!_n						;[INF] 3, 8
	bnc	$?L0009						;[INF] 2, 6
; line    91
$DGL	0,4
??bb00_vect_INTTM80:
; line    92
$DGL	0,5
	xor	a,a						;[INF] 2, 4
	mov	!_n,a						;[INF] 3, 8
; line    93
$DGL	0,6
	set1	_Timer80Flag					;[INF] 3, 6
??eb00_vect_INTTM80:
?L0009:
; line    95
$DGL	0,8
	movw	de,#_n						;[INF] 3, 6
	mov	a,[de]						;[INF] 1, 6
	inc	a						;[INF] 2, 4
	xch	a,[de]						;[INF] 1, 8
; line    96
$DGL	0,9
??ef_vect_INTTM80:
	pop	de						;[INF] 1, 6
	pop	ax						;[INF] 1, 6
	reti							;[INF] 1, 8
??ee_vect_INTTM80:
; line   110
_LED_flash:
$DGL	1,42
	push	hl						;[INF] 1, 4
	push	ax						;[INF] 1, 4
	movw	ax,sp						;[INF] 2, 6
	movw	hl,ax						;[INF] 1, 4
??bf_LED_flash:
; line   112
$DGL	0,3
	mov	a,[hl]	; i 					;[INF] 1, 6
	cmp	a,#08H	; 8 					;[INF] 2, 4
	bnz	$$+5						;[INF] 2, 6
	br	!?L0021						;[INF] 3, 6
	cmp	a,#07H	; 7 					;[INF] 2, 4
	bnz	$$+5						;[INF] 2, 6
	br	!?L0020						;[INF] 3, 6
	cmp	a,#06H	; 6 					;[INF] 2, 4
	bnz	$$+5						;[INF] 2, 6
	br	!?L0019						;[INF] 3, 6
	cmp	a,#05H	; 5 					;[INF] 2, 4
	bnz	$$+5						;[INF] 2, 6
	br	!?L0018						;[INF] 3, 6
	cmp	a,#04H	; 4 					;[INF] 2, 4
	bz	$?L0017						;[INF] 2, 6
	cmp	a,#03H	; 3 					;[INF] 2, 4
	bz	$?L0016						;[INF] 2, 6
	cmp	a,#02H	; 2 					;[INF] 2, 4
	bz	$?L0015						;[INF] 2, 6
	cmp	a,#01H	; 1 					;[INF] 2, 4
	bz	$$+5						;[INF] 2, 6
	br	!?L0022						;[INF] 3, 6
; line   113
$DGL	0,4
??bb00_LED_flash:
; line   114
$DGL	0,5
	clr1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	!?L0022						;[INF] 3, 6
; line   115
$DGL	0,6
?L0015:
	set1	P12.3						;[INF] 3, 6
	clr1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	!?L0022						;[INF] 3, 6
; line   116
$DGL	0,7
?L0016:
	set1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	clr1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	!?L0022						;[INF] 3, 6
; line   117
$DGL	0,8
?L0017:
	set1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	clr1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	$?L0022						;[INF] 2, 6
; line   118
$DGL	0,9
?L0018:
	set1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	clr1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	$?L0022						;[INF] 2, 6
; line   119
$DGL	0,10
?L0019:
	set1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	clr1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	$?L0022						;[INF] 2, 6
; line   120
$DGL	0,11
?L0020:
	set1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	clr1	P4.4						;[INF] 3, 6
	clr1	P4.2						;[INF] 3, 6
	br	$?L0022						;[INF] 2, 6
; line   121
$DGL	0,12
?L0021:
	set1	P12.3						;[INF] 3, 6
	set1	P2.1						;[INF] 3, 6
	set1	P2.2						;[INF] 3, 6
	set1	P2.3						;[INF] 3, 6
	set1	P13.0						;[INF] 3, 6
	set1	P4.5						;[INF] 3, 6
	set1	P4.4						;[INF] 3, 6
	set1	P4.2						;[INF] 3, 6
; line   122
$DGL	0,13
?L0022:
??eb00_LED_flash:
; line   124
$DGL	0,15
; line   125
$DGL	0,16
??ef_LED_flash:
	pop	ax						;[INF] 1, 6
	pop	hl						;[INF] 1, 6
	ret							;[INF] 1, 6
??ee_LED_flash:
; line   128
_main:
$DGL	1,53
??bf_main:
; line   129
$DGL	0,3
        movw  AX,#0FEFFH
$DGL	0,4
        movw  SP,AX
$DGL	0,5
        ; line   133
$DGL	0,6
	mov	WDTE,#0ACH	; 172 				;[INF] 3, 6
; line   134
$DGL	0,7
	clr1	_Timer80Flag					;[INF] 3, 6
; line   135
$DGL	0,8
	xor	a,a						;[INF] 2, 4
	mov	!_n,a						;[INF] 3, 8
; line   136
$DGL	0,9
	mov	!_m,a						;[INF] 3, 8
; line   137
$DGL	0,10
	di							;[INF] 3, 6
; line   138
$DGL	0,11
	call	!_CPU_Init					;[INF] 3, 6
; line   139
$DGL	0,12
	call	!_PORT_Init					;[INF] 3, 6
; line   140
$DGL	0,13
	call	!_Timer80_Init					;[INF] 3, 6
; line   141
$DGL	0,14
	ei							;[INF] 3, 6
; line   143
$DGL	0,16
?L0025:
; line   144
$DGL	0,17
??bb00_main:
; line   146
$DGL	0,19
	bf	_Timer80Flag,$?L0027				;[INF] 4,10
; line   147
$DGL	0,20
??bb01_main:
; line   148
$DGL	0,21
	clr1	_Timer80Flag					;[INF] 3, 6
; line   150
$DGL	0,23
	movw	de,#_m						;[INF] 3, 6
	mov	a,[de]						;[INF] 1, 6
	inc	a						;[INF] 2, 4
	xch	a,[de]						;[INF] 1, 8
; line   151
$DGL	0,24
	mov	a,[de]						;[INF] 1, 6
	xch	a,x						;[INF] 1, 4
	xor	a,a						;[INF] 2, 4
	call	!_LED_flash					;[INF] 3, 6
; line   152
$DGL	0,25
	mov	a,!_m						;[INF] 3, 8
	sub	a,#08H	; 8 					;[INF] 2, 4
	bnz	$?L0029						;[INF] 2, 6
; line   153
$DGL	0,26
??bb02_main:
; line   154
$DGL	0,27
	mov	!_m,a						;[INF] 3, 8
??eb02_main:
?L0029:
?L0030:
; line   156
$DGL	0,29
	mov	WDTE,#0ACH	; 172 				;[INF] 3, 6
??eb01_main:
?L0027:
?L0028:
??eb00_main:
	br	$?L0025						;[INF] 2, 6
?L0026:
; line   163
$DGL	0,36
??ef_main:
	ret							;[INF] 1, 6
??ee_main:

@@VECT1A	CSEG	AT    001AH
_@vect1a:
	DW	_vect_INTTM80
	END


; *** Code Information ***
;
; $FILE E:\Demo_Soure\9222timer80\timer80.c
;
; $FUNC PORT_Init(23)
;	void=(void)
;	CODE SIZE= 40 bytes, CLOCK_SIZE= 84 clocks, STACK_SIZE= 0 bytes
;
; $FUNC CPU_Init(43)
;	void=(void)
;	CODE SIZE= 10 bytes, CLOCK_SIZE= 24 clocks, STACK_SIZE= 0 bytes
;
; $FUNC Timer80_Init(59)
;	void=(void)
;	CODE SIZE= 22 bytes, CLOCK_SIZE= 48 clocks, STACK_SIZE= 0 bytes
;
; $FUNC vect_INTTM80(88)
;	void=(void)
;	CODE SIZE= 28 bytes, CLOCK_SIZE= 90 clocks, STACK_SIZE= 4 bytes
;
; $FUNC LED_flash(110)
;	void=(unsigned char i:x)
;	CODE SIZE= 265 bytes, CLOCK_SIZE= 578 clocks, STACK_SIZE= 4 bytes
;
; $FUNC main(128)
;	void=(void)
;	CODE SIZE= 66 bytes, CLOCK_SIZE= 166 clocks, STACK_SIZE= 2 bytes
;
; $CALL CPU_Init(138)
;	void=(void)
;
; $CALL PORT_Init(139)
;	void=(void)
;
; $CALL Timer80_Init(140)
;	void=(void)
;
; $CALL LED_flash(151)
;	void=(int:ax)

; Target chip : uPD78F9222
; Device file : V2.11