fifo.tan.rpt

来自「FIFO yibu de v daima」· RPT 代码 · 共 237 行 · 第 1/5 页

; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg2 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[4]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg3 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[4]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg4 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[4]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg5 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[4]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg6 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[4]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg0 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg1 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg2 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg3 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg4 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg5 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg6 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[3]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg0 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg1 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg2 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg3 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg4 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg5 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg6 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[2]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg0 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg1 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg2 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg3 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg4 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg5 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 196.97 MHz ( period = 5.077 ns )               ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg6 ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|q_b[1]                          ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.319 ns                ;
; N/A   ; 214.68 MHz ( period = 4.658 ns )               ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg2 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.348 ns                ;
; N/A   ; 220.07 MHz ( period = 4.544 ns )               ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg3 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.234 ns                ;
; N/A   ; 228.10 MHz ( period = 4.384 ns )               ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg3 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.074 ns                ;
; N/A   ; 229.99 MHz ( period = 4.348 ns )               ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg2 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 4.038 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[6]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg4 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 3.049 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[6]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg5 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 3.048 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.874 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg1 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.873 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg0 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.750 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg1 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.734 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[7]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg6 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.625 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg4 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.602 ns                ;
; N/A   ; Restricted to 275.03 MHz ( period = 3.636 ns ) ; FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[7]                                                      ; Ram_128:Ram_128|altsyncram:altsyncram_component|altsyncram_sig1:auto_generated|ram_block1a0~portb_address_reg5 ; clk_rd     ; clk_rd   ; None                        ; None                      ; 2.560 ns                ;
+-------+------------------------------------------------+----------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk_wr'                                                                                                                                                                                                                                                                                                                                                                 ;
+-------+----------------------------------+---------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------