fifo.tan.qmsg

来自「FIFO yibu de v daima」· QMSG 代码 · 共 22 行 · 第 1/5 页

{ "Warning" "WTAN_SCC_LOOP" "1 " "Warning: Found combinational loop of 1 nodes" { { "Warning" "WTAN_SCC_NODE" "FIFO_ctl:FIFO_ctl_inst\|G2B:G2B_wr\|Bin~5 " "Warning: Node \"FIFO_ctl:FIFO_ctl_inst\|G2B:G2B_wr\|Bin~5\"" {  } { { "G2B.v" "" { Text "E:/FIFO_yibu/G2B.v" 3 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 0}  } { { "G2B.v" "" { Text "E:/FIFO_yibu/G2B.v" 3 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 0}
{ "Warning" "WTAN_SCC_LOOP" "1 " "Warning: Found combinational loop of 1 nodes" { { "Warning" "WTAN_SCC_NODE" "FIFO_ctl:FIFO_ctl_inst\|G2B:G2B_wr\|Bin~6 " "Warning: Node \"FIFO_ctl:FIFO_ctl_inst\|G2B:G2B_wr\|Bin~6\"" {  } { { "G2B.v" "" { Text "E:/FIFO_yibu/G2B.v" 3 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 0}  } { { "G2B.v" "" { Text "E:/FIFO_yibu/G2B.v" 3 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk_rd " "Info: Assuming node \"clk_rd\" is an undefined clock" {  } { { "FIFO.v" "" { Text "E:/FIFO_yibu/FIFO.v" 2 -1 0 } } { "f:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk_rd" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "clk_wr " "Info: Assuming node \"clk_wr\" is an undefined clock" {  } { { "FIFO.v" "" { Text "E:/FIFO_yibu/FIFO.v" 1 -1 0 } } { "f:/altera/80/quartus/bin/Assignment Editor.qase" "" { Assignment "f:/altera/80/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk_wr" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk_rd register FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\] register FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\] 134.03 MHz 7.461 ns Internal " "Info: Clock \"clk_rd\" has Internal fmax of 134.03 MHz between source register \"FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\]\" and destination register \"FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\]\" (period= 7.461 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.200 ns + Longest register register " "Info: + Longest register to register delay is 7.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\] 1 REG LC_X22_Y13_N5 10 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X22_Y13_N5; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.180 ns) + CELL(0.590 ns) 1.770 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~324 2 COMB LC_X21_Y13_N3 1 " "Info: 2: + IC(1.180 ns) + CELL(0.590 ns) = 1.770 ns; Loc. = LC_X21_Y13_N3; Fanout = 1; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~324'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.770 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] FIFO_ctl:FIFO_ctl_inst|Equal1~324 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.413 ns) + CELL(0.442 ns) 2.625 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~328 3 COMB LC_X21_Y13_N5 1 " "Info: 3: + IC(0.413 ns) + CELL(0.442 ns) = 2.625 ns; Loc. = LC_X21_Y13_N5; Fanout = 1; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~328'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.855 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~324 FIFO_ctl:FIFO_ctl_inst|Equal1~328 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.431 ns) + CELL(0.114 ns) 3.170 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~332 4 COMB LC_X21_Y13_N8 2 " "Info: 4: + IC(0.431 ns) + CELL(0.114 ns) = 3.170 ns; Loc. = LC_X21_Y13_N8; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~332'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.545 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~328 FIFO_ctl:FIFO_ctl_inst|Equal1~332 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.086 ns) + CELL(0.114 ns) 4.370 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~333 5 COMB LC_X22_Y13_N9 2 " "Info: 5: + IC(1.086 ns) + CELL(0.114 ns) = 4.370 ns; Loc. = LC_X22_Y13_N9; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~333'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.200 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~332 FIFO_ctl:FIFO_ctl_inst|Equal1~333 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.454 ns) + CELL(0.292 ns) 5.116 ns FIFO_ctl:FIFO_ctl_inst\|rd_en~13 6 COMB LC_X22_Y13_N8 3 " "Info: 6: + IC(0.454 ns) + CELL(0.292 ns) = 5.116 ns; Loc. = LC_X22_Y13_N8; Fanout = 3; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|rd_en~13'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.746 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~333 FIFO_ctl:FIFO_ctl_inst|rd_en~13 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 20 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.410 ns) + CELL(0.423 ns) 5.949 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[0\]~91 7 COMB LC_X22_Y13_N0 2 " "Info: 7: + IC(0.410 ns) + CELL(0.423 ns) = 5.949 ns; Loc. = LC_X22_Y13_N0; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[0\]~91'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.833 ns" { FIFO_ctl:FIFO_ctl_inst|rd_en~13 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[0]~91 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 6.027 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[1\]~93 8 COMB LC_X22_Y13_N1 2 " "Info: 8: + IC(0.000 ns) + CELL(0.078 ns) = 6.027 ns; Loc. = LC_X22_Y13_N1; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[1\]~93'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.078 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[0]~91 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]~93 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 6.105 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[2\]~95 9 COMB LC_X22_Y13_N2 2 " "Info: 9: + IC(0.000 ns) + CELL(0.078 ns) = 6.105 ns; Loc. = LC_X22_Y13_N2; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[2\]~95'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.078 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]~93 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]~95 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 6.183 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[3\]~87 10 COMB LC_X22_Y13_N3 2 " "Info: 10: + IC(0.000 ns) + CELL(0.078 ns) = 6.183 ns; Loc. = LC_X22_Y13_N3; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[3\]~87'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.078 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]~95 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]~87 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 6.361 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[4\]~83 11 COMB LC_X22_Y13_N4 3 " "Info: 11: + IC(0.000 ns) + CELL(0.178 ns) = 6.361 ns; Loc. = LC_X22_Y13_N4; Fanout = 3; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[4\]~83'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.178 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]~87 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]~83 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.839 ns) 7.200 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\] 12 REG LC_X22_Y13_N5 10 " "Info: 12: + IC(0.000 ns) + CELL(0.839 ns) = 7.200 ns; Loc. = LC_X22_Y13_N5; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.839 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]~83 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.226 ns ( 44.81 % ) " "Info: Total cell delay = 3.226 ns ( 44.81 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.974 ns ( 55.19 % ) " "Info: Total interconnect delay = 3.974 ns ( 55.19 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "7.200 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] FIFO_ctl:FIFO_ctl_inst|Equal1~324 FIFO_ctl:FIFO_ctl_inst|Equal1~328 FIFO_ctl:FIFO_ctl_inst|Equal1~332 FIFO_ctl:FIFO_ctl_inst|Equal1~333 FIFO_ctl:FIFO_ctl_inst|rd_en~13 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[0]~91 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]~93 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]~95 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]~87 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]~83 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "7.200 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} FIFO_ctl:FIFO_ctl_inst|Equal1~324 {} FIFO_ctl:FIFO_ctl_inst|Equal1~328 {} FIFO_ctl:FIFO_ctl_inst|Equal1~332 {} FIFO_ctl:FIFO_ctl_inst|Equal1~333 {} FIFO_ctl:FIFO_ctl_inst|rd_en~13 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[0]~91 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]~93 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]~95 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]~87 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]~83 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 1.180ns 0.413ns 0.431ns 1.086ns 0.454ns 0.410ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.590ns 0.442ns 0.114ns 0.114ns 0.292ns 0.423ns 0.078ns 0.078ns 0.078ns 0.178ns 0.839ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_rd destination 2.962 ns + Shortest register " "Info: + Shortest clock path from clock \"clk_rd\" to destination register is 2.962 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk_rd 1 CLK PIN_29 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 23; CLK Node = 'clk_rd'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_rd } "NODE_NAME" } } { "FIFO.v" "" { Text "E:/FIFO_yibu/FIFO.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.782 ns) + CELL(0.711 ns) 2.962 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\] 2 REG LC_X22_Y13_N5 10 " "Info: 2: + IC(0.782 ns) + CELL(0.711 ns) = 2.962 ns; Loc. = LC_X22_Y13_N5; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.493 ns" { clk_rd FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 73.60 % ) " "Info: Total cell delay = 2.180 ns ( 73.60 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.782 ns ( 26.40 % ) " "Info: Total interconnect delay = 0.782 ns ( 26.40 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_rd FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_rd {} clk_rd~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_rd source 2.962 ns - Longest register " "Info: - Longest clock path from clock \"clk_rd\" to source register is 2.962 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk_rd 1 CLK PIN_29 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 23; CLK Node = 'clk_rd'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_rd } "NODE_NAME" } } { "FIFO.v" "" { Text "E:/FIFO_yibu/FIFO.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.782 ns) + CELL(0.711 ns) 2.962 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\] 2 REG LC_X22_Y13_N5 10 " "Info: 2: + IC(0.782 ns) + CELL(0.711 ns) = 2.962 ns; Loc. = LC_X22_Y13_N5; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_rd\|bin\[5\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.493 ns" { clk_rd FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 73.60 % ) " "Info: Total cell delay = 2.180 ns ( 73.60 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.782 ns ( 26.40 % ) " "Info: Total interconnect delay = 0.782 ns ( 26.40 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_rd FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_rd {} clk_rd~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_rd FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_rd {} clk_rd~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_rd {} clk_rd~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "7.200 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] FIFO_ctl:FIFO_ctl_inst|Equal1~324 FIFO_ctl:FIFO_ctl_inst|Equal1~328 FIFO_ctl:FIFO_ctl_inst|Equal1~332 FIFO_ctl:FIFO_ctl_inst|Equal1~333 FIFO_ctl:FIFO_ctl_inst|rd_en~13 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[0]~91 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]~93 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]~95 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]~87 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]~83 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "7.200 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} FIFO_ctl:FIFO_ctl_inst|Equal1~324 {} FIFO_ctl:FIFO_ctl_inst|Equal1~328 {} FIFO_ctl:FIFO_ctl_inst|Equal1~332 {} FIFO_ctl:FIFO_ctl_inst|Equal1~333 {} FIFO_ctl:FIFO_ctl_inst|rd_en~13 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[0]~91 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[1]~93 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[2]~95 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[3]~87 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[4]~83 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 1.180ns 0.413ns 0.431ns 1.086ns 0.454ns 0.410ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.590ns 0.442ns 0.114ns 0.114ns 0.292ns 0.423ns 0.078ns 0.078ns 0.078ns 0.178ns 0.839ns } "" } } { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_rd FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_rd {} clk_rd~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_rd {} clk_rd~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_rd|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk_wr register FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[6\] register FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[5\] 145.31 MHz 6.882 ns Internal " "Info: Clock \"clk_wr\" has Internal fmax of 145.31 MHz between source register \"FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[6\]\" and destination register \"FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[5\]\" (period= 6.882 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.621 ns + Longest register register " "Info: + Longest register to register delay is 6.621 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[6\] 1 REG LC_X20_Y13_N6 10 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X20_Y13_N6; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[6\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.807 ns) + CELL(0.590 ns) 1.397 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~326 2 COMB LC_X21_Y13_N6 1 " "Info: 2: + IC(0.807 ns) + CELL(0.590 ns) = 1.397 ns; Loc. = LC_X21_Y13_N6; Fanout = 1; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~326'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.397 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] FIFO_ctl:FIFO_ctl_inst|Equal1~326 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(0.590 ns) 2.423 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~328 3 COMB LC_X21_Y13_N5 1 " "Info: 3: + IC(0.436 ns) + CELL(0.590 ns) = 2.423 ns; Loc. = LC_X21_Y13_N5; Fanout = 1; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~328'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.026 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~326 FIFO_ctl:FIFO_ctl_inst|Equal1~328 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.431 ns) + CELL(0.114 ns) 2.968 ns FIFO_ctl:FIFO_ctl_inst\|Equal1~332 4 COMB LC_X21_Y13_N8 2 " "Info: 4: + IC(0.431 ns) + CELL(0.114 ns) = 2.968 ns; Loc. = LC_X21_Y13_N8; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|Equal1~332'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.545 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~328 FIFO_ctl:FIFO_ctl_inst|Equal1~332 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 25 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.709 ns) + CELL(0.114 ns) 3.791 ns FIFO_ctl:FIFO_ctl_inst\|full 5 COMB LC_X20_Y13_N9 19 " "Info: 5: + IC(0.709 ns) + CELL(0.114 ns) = 3.791 ns; Loc. = LC_X20_Y13_N9; Fanout = 19; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|full'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.823 ns" { FIFO_ctl:FIFO_ctl_inst|Equal1~332 FIFO_ctl:FIFO_ctl_inst|full } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.454 ns) + CELL(0.292 ns) 4.537 ns FIFO_ctl:FIFO_ctl_inst\|wr_en~13 6 COMB LC_X20_Y13_N8 3 " "Info: 6: + IC(0.454 ns) + CELL(0.292 ns) = 4.537 ns; Loc. = LC_X20_Y13_N8; Fanout = 3; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|wr_en~13'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.746 ns" { FIFO_ctl:FIFO_ctl_inst|full FIFO_ctl:FIFO_ctl_inst|wr_en~13 } "NODE_NAME" } } { "FIFO_ctl.v" "" { Text "E:/FIFO_yibu/FIFO_ctl.v" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.410 ns) + CELL(0.423 ns) 5.370 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[0\]~91 7 COMB LC_X20_Y13_N0 2 " "Info: 7: + IC(0.410 ns) + CELL(0.423 ns) = 5.370 ns; Loc. = LC_X20_Y13_N0; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[0\]~91'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.833 ns" { FIFO_ctl:FIFO_ctl_inst|wr_en~13 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[0]~91 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 5.448 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[1\]~93 8 COMB LC_X20_Y13_N1 2 " "Info: 8: + IC(0.000 ns) + CELL(0.078 ns) = 5.448 ns; Loc. = LC_X20_Y13_N1; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[1\]~93'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.078 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[0]~91 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[1]~93 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 5.526 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[2\]~95 9 COMB LC_X20_Y13_N2 2 " "Info: 9: + IC(0.000 ns) + CELL(0.078 ns) = 5.526 ns; Loc. = LC_X20_Y13_N2; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[2\]~95'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.078 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[1]~93 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[2]~95 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 5.604 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[3\]~87 10 COMB LC_X20_Y13_N3 2 " "Info: 10: + IC(0.000 ns) + CELL(0.078 ns) = 5.604 ns; Loc. = LC_X20_Y13_N3; Fanout = 2; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[3\]~87'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.078 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[2]~95 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[3]~87 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 5.782 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[4\]~83 11 COMB LC_X20_Y13_N4 3 " "Info: 11: + IC(0.000 ns) + CELL(0.178 ns) = 5.782 ns; Loc. = LC_X20_Y13_N4; Fanout = 3; COMB Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[4\]~83'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.178 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[3]~87 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[4]~83 } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.839 ns) 6.621 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[5\] 12 REG LC_X20_Y13_N5 10 " "Info: 12: + IC(0.000 ns) + CELL(0.839 ns) = 6.621 ns; Loc. = LC_X20_Y13_N5; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[5\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.839 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[4]~83 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.374 ns ( 50.96 % ) " "Info: Total cell delay = 3.374 ns ( 50.96 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.247 ns ( 49.04 % ) " "Info: Total interconnect delay = 3.247 ns ( 49.04 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.621 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] FIFO_ctl:FIFO_ctl_inst|Equal1~326 FIFO_ctl:FIFO_ctl_inst|Equal1~328 FIFO_ctl:FIFO_ctl_inst|Equal1~332 FIFO_ctl:FIFO_ctl_inst|full FIFO_ctl:FIFO_ctl_inst|wr_en~13 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[0]~91 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[1]~93 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[2]~95 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[3]~87 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[4]~83 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "6.621 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] {} FIFO_ctl:FIFO_ctl_inst|Equal1~326 {} FIFO_ctl:FIFO_ctl_inst|Equal1~328 {} FIFO_ctl:FIFO_ctl_inst|Equal1~332 {} FIFO_ctl:FIFO_ctl_inst|full {} FIFO_ctl:FIFO_ctl_inst|wr_en~13 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[0]~91 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[1]~93 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[2]~95 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[3]~87 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[4]~83 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] {} } { 0.000ns 0.807ns 0.436ns 0.431ns 0.709ns 0.454ns 0.410ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.590ns 0.590ns 0.114ns 0.114ns 0.292ns 0.423ns 0.078ns 0.078ns 0.078ns 0.178ns 0.839ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_wr destination 2.962 ns + Shortest register " "Info: + Shortest clock path from clock \"clk_wr\" to destination register is 2.962 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk_wr 1 CLK PIN_28 32 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 32; CLK Node = 'clk_wr'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_wr } "NODE_NAME" } } { "FIFO.v" "" { Text "E:/FIFO_yibu/FIFO.v" 1 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.782 ns) + CELL(0.711 ns) 2.962 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[5\] 2 REG LC_X20_Y13_N5 10 " "Info: 2: + IC(0.782 ns) + CELL(0.711 ns) = 2.962 ns; Loc. = LC_X20_Y13_N5; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[5\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.493 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 73.60 % ) " "Info: Total cell delay = 2.180 ns ( 73.60 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.782 ns ( 26.40 % ) " "Info: Total interconnect delay = 0.782 ns ( 26.40 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_wr {} clk_wr~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_wr source 2.962 ns - Longest register " "Info: - Longest clock path from clock \"clk_wr\" to source register is 2.962 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk_wr 1 CLK PIN_28 32 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 32; CLK Node = 'clk_wr'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_wr } "NODE_NAME" } } { "FIFO.v" "" { Text "E:/FIFO_yibu/FIFO.v" 1 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.782 ns) + CELL(0.711 ns) 2.962 ns FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[6\] 2 REG LC_X20_Y13_N6 10 " "Info: 2: + IC(0.782 ns) + CELL(0.711 ns) = 2.962 ns; Loc. = LC_X20_Y13_N6; Fanout = 10; REG Node = 'FIFO_ctl:FIFO_ctl_inst\|gray_gena:gray_gena_inst_wr\|bin\[6\]'" {  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.493 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] } "NODE_NAME" } } { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 73.60 % ) " "Info: Total cell delay = 2.180 ns ( 73.60 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.782 ns ( 26.40 % ) " "Info: Total interconnect delay = 0.782 ns ( 26.40 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_wr {} clk_wr~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_wr {} clk_wr~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } } { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_wr {} clk_wr~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "gray_gena.v" "" { Text "E:/FIFO_yibu/gray_gena.v" 8 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 0}  } { { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.621 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] FIFO_ctl:FIFO_ctl_inst|Equal1~326 FIFO_ctl:FIFO_ctl_inst|Equal1~328 FIFO_ctl:FIFO_ctl_inst|Equal1~332 FIFO_ctl:FIFO_ctl_inst|full FIFO_ctl:FIFO_ctl_inst|wr_en~13 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[0]~91 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[1]~93 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[2]~95 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[3]~87 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[4]~83 FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "6.621 ns" { FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] {} FIFO_ctl:FIFO_ctl_inst|Equal1~326 {} FIFO_ctl:FIFO_ctl_inst|Equal1~328 {} FIFO_ctl:FIFO_ctl_inst|Equal1~332 {} FIFO_ctl:FIFO_ctl_inst|full {} FIFO_ctl:FIFO_ctl_inst|wr_en~13 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[0]~91 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[1]~93 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[2]~95 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[3]~87 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[4]~83 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] {} } { 0.000ns 0.807ns 0.436ns 0.431ns 0.709ns 0.454ns 0.410ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.590ns 0.590ns 0.114ns 0.114ns 0.292ns 0.423ns 0.078ns 0.078ns 0.078ns 0.178ns 0.839ns } "" } } { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_wr {} clk_wr~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[5] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } } { "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "f:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.962 ns" { clk_wr FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] } "NODE_NAME" } } { "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "f:/altera/80/quartus/bin/Technology_Viewer.qrui" "2.962 ns" { clk_wr {} clk_wr~out0 {} FIFO_ctl:FIFO_ctl_inst|gray_gena:gray_gena_inst_wr|bin[6] {} } { 0.000ns 0.000ns 0.782ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 0}