os_sem.asm

此代码是ucos-II在凌阳61单片机上的移植

LM43:
	R4=[BP]	// QImode move
	R1=[R4]	// QImode move
	[SP--]=R1	// QImode move
	call _OSEventTaskWait	// call without return value
	SP = SP + 1	//SP
.debug
	.dw '.stabn 0x44,0,142,',0,0
	.dd LM44-_OSSemPend
	.dw 0x0d,0x0a
.code
LM44:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,143,',0,0
	.dd LM45-_OSSemPend
	.dw 0x0d,0x0a
.code
LM45:
	call _OSSched	// call without return value
.debug
	.dw '.stabn 0x44,0,144,',0,0
	.dd LM46-_OSSemPend
	.dw 0x0d,0x0a
.code
LM46:
// GCC inline ASM start
	INT OFF 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,145,',0,0
	.dd LM47-_OSSemPend
	.dw 0x0d,0x0a
.code
LM47:
	R2=[_OSTCBCur]	// QImode move
	R1=R2	// QImode move
	R2=R2+5
	R3=R2	// QImode move
	R3=[R3]	// QImode move
	R1=R3&1
	CMP R1,0	// QImode test
	NSJZ L18	//QImode EQ
.debug
	.dw '.stabn 0x44,0,146,',0,0
	.dd LM48-_OSSemPend
	.dw 0x0d,0x0a
.code
LM48:
	R4=[BP]	// QImode move
	R1=[R4]	// QImode move
	[SP--]=R1	// QImode move
	call _OSEventTO	// call without return value
	SP = SP + 1	//SP
.debug
	.dw '.stabn 0x44,0,147,',0,0
	.dd LM49-_OSSemPend
	.dw 0x0d,0x0a
.code
LM49:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,148,',0,0
	.dd LM50-_OSSemPend
	.dw 0x0d,0x0a
.code
LM50:
	R1=[BP]	// QImode move
	R1=[BP]	// QImode move
	R2=R1+2
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	R2=10	// QImode move
	R4=R1	// QImode move
	[R4]=R2	// QImode move
.debug
	.dw '.stabn 0x44,0,149,',0,0
	.dd LM51-_OSSemPend
	.dw 0x0d,0x0a
.code
LM51:
	pc=L15	// Indirect jump
L18:
.debug
	.dw '.stabn 0x44,0,150,',0,0
	.dd LM52-_OSSemPend
	.dw 0x0d,0x0a
.code
LM52:
	R2=[_OSTCBCur]	// QImode move
	R1=R2	// QImode move
	R2=R2+3
	R1=0	// QImode move
	R3=R2	// QImode move
	[R3]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,151,',0,0
	.dd LM53-_OSSemPend
	.dw 0x0d,0x0a
.code
LM53:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,152,',0,0
	.dd LM54-_OSSemPend
	.dw 0x0d,0x0a
.code
LM54:
	R1=[BP]	// QImode move
	R4=[BP]	// QImode move
	R2=R4+2
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	R2=0	// QImode move
	R4=R1	// QImode move
	[R4]=R2	// QImode move
L19:
L17:
L15:
.debug
	.dw '.stabn 0x44,0,155,',0,0
	.dd LM55-_OSSemPend
	.dw 0x0d,0x0a
.code
LM55:
.debug
	.dw '.stabn 0x44,0,155,',0,0
	.dd LM56-_OSSemPend
	.dw 0x0d,0x0a
.code
LM56:
L12:

	sp+=1
	pop bp from [sp]
	retf
	.endp	// end of OSSemPend

.debug
	.dw '.stabs "pevent:p39",160,0,0,4',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "timeout:p23",160,0,0,5',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "err:p41=*21",160,0,0,6',0x0d,0x0a
.CODE
.debug
	.dw '.stabf ',0,0
	.dd LME3-_OSSemPend
	.dw 0x0d,0x0a
.code
LME3:
.code
.debug
	.dw '.stabs "OSSemPost:F21",36,0,0,',0,0,offset _OSSemPost,seg _OSSemPost,0x0d,0x0a
.CODE
.public _OSSemPost
_OSSemPost:	.proc
.debug
	.dw '.stabn 0x44,0,175,',0,0
	.dd LM57-_OSSemPost
	.dw 0x0d,0x0a
.code
LM57:
	// total=1, vars=1
	// frame_pointer_needed: 1
	push bp to [sp]
	sp-=1
	bp=sp+1

	R1=BP+4
	[BP]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,176,',0,0
	.dd LM58-_OSSemPost
	.dw 0x0d,0x0a
.code
LM58:
// GCC inline ASM start
	INT OFF 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,177,',0,0
	.dd LM59-_OSSemPost
	.dw 0x0d,0x0a
.code
LM59:
	R3=[BP]	// QImode move
	R2=[R3]	// QImode move
	R1=R2	// QImode move
	R2=R2+4
	R4=R2	// QImode move
	R1=[R4]	// QImode move
	CMP R1,3	// QImode compare
	NSJZ L25	//QImode EQ
.debug
	.dw '.stabn 0x44,0,178,',0,0
	.dd LM60-_OSSemPost
	.dw 0x0d,0x0a
.code
LM60:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,179,',0,0
	.dd LM61-_OSSemPost
	.dw 0x0d,0x0a
.code
LM61:
	R1=1	// QImode move
	pc=L24	// Indirect jump
L25:
.debug
	.dw '.stabn 0x44,0,181,',0,0
	.dd LM62-_OSSemPost
	.dw 0x0d,0x0a
.code
LM62:
	R1=[BP]	// QImode move
	R2=[R1]	// QImode move
	R1=R2	// QImode move
	R2=R2+5
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	CMP R1,0	// QImode test
	NSJZ L26	//QImode EQ
.debug
	.dw '.stabn 0x44,0,182,',0,0
	.dd LM63-_OSSemPost
	.dw 0x0d,0x0a
.code
LM63:
	R1=1	// QImode move
	[SP--]=R1	// QImode move
	R1=0	// QImode move
	[SP--]=R1	// QImode move
	R4=[BP]	// QImode move
	R1=[R4]	// QImode move
	[SP--]=R1	// QImode move
	call _OSEventTaskRdy	// call without return value
	SP = SP + 3	//SP
.debug
	.dw '.stabn 0x44,0,183,',0,0
	.dd LM64-_OSSemPost
	.dw 0x0d,0x0a
.code
LM64:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,184,',0,0
	.dd LM65-_OSSemPost
	.dw 0x0d,0x0a
.code
LM65:
	call _OSSched	// call without return value
.debug
	.dw '.stabn 0x44,0,185,',0,0
	.dd LM66-_OSSemPost
	.dw 0x0d,0x0a
.code
LM66:
	R1=0	// QImode move
	pc=L24	// Indirect jump
.debug
	.dw '.stabn 0x44,0,186,',0,0
	.dd LM67-_OSSemPost
	.dw 0x0d,0x0a
.code
LM67:
	pc=L27	// Indirect jump
L26:
.debug
	.dw '.stabn 0x44,0,187,',0,0
	.dd LM68-_OSSemPost
	.dw 0x0d,0x0a
.code
LM68:
	R1=[BP]	// QImode move
	R2=[R1]	// QImode move
	R1=R2	// QImode move
	R2=R2+3
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	CMP R1,(-2)	// QImode compare
	NSJA L28	//QImode GTU
.debug
	.dw '.stabn 0x44,0,188,',0,0
	.dd LM69-_OSSemPost
	.dw 0x0d,0x0a
.code
LM69:
	R4=[BP]	// QImode move
	R2=[R4]	// QImode move
	R1=R2	// QImode move
	R2=R2+3
	R2=[BP]	// QImode move
	R1=[R2]	// QImode move
	R2=R1	// QImode move
	R1=R1+3
	R4=[BP]	// QImode move
	R3=[R4]	// QImode move
	R2=R3	// QImode move
	R3=R3+3
	R4=R3	// QImode move
	R2=[R4]	// QImode move
	R3=R2+1
	R2=R1	// QImode move
	[R2]=R3	// QImode move
.debug
	.dw '.stabn 0x44,0,189,',0,0
	.dd LM70-_OSSemPost
	.dw 0x0d,0x0a
.code
LM70:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,190,',0,0
	.dd LM71-_OSSemPost
	.dw 0x0d,0x0a
.code
LM71:
	R1=0	// QImode move
	pc=L24	// Indirect jump
.debug
	.dw '.stabn 0x44,0,191,',0,0
	.dd LM72-_OSSemPost
	.dw 0x0d,0x0a
.code
LM72:
	pc=L27	// Indirect jump
L28:
.debug
	.dw '.stabn 0x44,0,192,',0,0
	.dd LM73-_OSSemPost
	.dw 0x0d,0x0a
.code
LM73:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,193,',0,0
	.dd LM74-_OSSemPost
	.dw 0x0d,0x0a
.code
LM74:
	R1=50	// QImode move
	pc=L24	// Indirect jump
L29:
L27:
.debug
	.dw '.stabn 0x44,0,196,',0,0
	.dd LM75-_OSSemPost
	.dw 0x0d,0x0a
.code
LM75:
.debug
	.dw '.stabn 0x44,0,196,',0,0
	.dd LM76-_OSSemPost
	.dw 0x0d,0x0a
.code
LM76:
L24:

	sp+=1
	pop bp from [sp]
	retf
	.endp	// end of OSSemPost

.debug
	.dw '.stabs "pevent:p39",160,0,0,4',0x0d,0x0a
.CODE
.debug
	.dw '.stabf ',0,0
	.dd LME4-_OSSemPost
	.dw 0x0d,0x0a
.code
LME4:
.code
.debug
	.dw '.stabs "OSSemQuery:F21",36,0,0,',0,0,offset _OSSemQuery,seg _OSSemQuery,0x0d,0x0a
.CODE
.public _OSSemQuery
_OSSemQuery:	.proc
.debug
	.dw '.stabn 0x44,0,215,',0,0
	.dd LM77-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM77:
	// total=8, vars=8
	// frame_pointer_needed: 1
	push bp to [sp]
	sp-=8
	bp=sp+1

	R2=BP+11
.debug
	.dw '.stabn 0x44,0,216,',0,0
	.dd LM78-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM78:
LBB4:
.debug
	.dw '.stabn 0x44,0,221,',0,0
	.dd LM79-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM79:
// GCC inline ASM start
	INT OFF 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,222,',0,0
	.dd LM80-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM80:
	R1=R2	// QImode move
	R3=[R1]	// QImode move
	R1=R3	// QImode move
	R3=R3+4
	R4=R3	// QImode move
	R1=[R4]	// QImode move
	CMP R1,3	// QImode compare
	NSJZ L34	//QImode EQ
.debug
	.dw '.stabn 0x44,0,223,',0,0
	.dd LM81-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM81:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,224,',0,0
	.dd LM82-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM82:
	R1=1	// QImode move
	pc=L33	// Indirect jump
L34:
.debug
	.dw '.stabn 0x44,0,226,',0,0
	.dd LM83-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM83:
	R1=R2	// QImode move
	R3=R2+1
	R4=R3	// QImode move
	R1=[R4]	// QImode move
	R3=R1	// QImode move
	R1=R1+3
	R3=R2	// QImode move
	R4=[R3]	// QImode move
	R3=R4	// QImode move
	R3=R4+5
	[bp+6]=R3	// QImode move
	R4=[bp+6]	// QImode move
	R3=[R4]	// QImode move
	R4=R1	// QImode move
	[R4]=R3	// QImode move
.debug
	.dw '.stabn 0x44,0,227,',0,0
	.dd LM84-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM84:
	R3=BP	// QImode move
	R1=BP+1
	R4=R2	// QImode move
	R3=[R4]	// QImode move
	R4=R3+1
	R3=R1	// QImode move
	[R3]=R4	// QImode move
.debug
	.dw '.stabn 0x44,0,228,',0,0
	.dd LM85-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM85:
	R3=BP	// QImode move
	R1=BP+2
	R3=R2	// QImode move
	R4=R2+1
	[bp+6]=R4	// QImode move
	R4=[bp+6]	// QImode move
	R3=[R4]	// QImode move
	R4=R3+1
	R3=R1	// QImode move
	[R3]=R4	// QImode move
.debug
	.dw '.stabn 0x44,0,229,',0,0
	.dd LM86-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM86:
	R1=0	// QImode move
	[BP]=R1	// QImode move
L35:
	R1=[BP]	// QImode move
	CMP R1,1	// QImode compare
	NSJNA L38	//QImode LEU
	pc=L36	// Indirect jump
L38:
.debug
	.dw '.stabn 0x44,0,230,',0,0
	.dd LM87-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM87:
	R3=BP	// QImode move
	R4=BP+2
	[bp+7]=R4	// QImode move
	R1=[bp+7]	// QImode move
	R3=[R1]	// QImode move
	[bp+3]=BP	// QImode move
	R4=BP+1
	[bp+6]=R4	// QImode move
	R1=[bp+6]	// QImode move
	R1=[R1]	// QImode move
	[bp+4]=R1	// QImode move
	R4=[bp+4]	// QImode move
	R4=[R4]	// QImode move
	[bp+5]=R4	// QImode move
	R1=[bp+5]	// QImode move
	R4=R3	// QImode move
	[R4]=R1	// QImode move
	R1=[bp+4]	// QImode move
	R1=R1+1
	[bp+4]=R1	// QImode move
	R4=[bp+4]	// QImode move
	R1=[bp+6]	// QImode move
	[R1]=R4	// QImode move
	R3=R3+1
	R4=[bp+7]	// QImode move
	[R4]=R3	// QImode move
.debug
	.dw '.stabn 0x44,0,229,',0,0
	.dd LM88-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM88:
L37:
	R1=[BP]	// QImode move
	R3=R1+1
	[BP]=R3	// QImode move
	pc=L35	// Indirect jump
L36:
.debug
	.dw '.stabn 0x44,0,232,',0,0
	.dd LM89-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM89:
	R1=R2	// QImode move
	R3=R2+1
	R4=R3	// QImode move
	R1=[R4]	// QImode move
	R3=R2	// QImode move
	R4=[R3]	// QImode move
	R3=R4	// QImode move
	R3=R4+3
	[bp+6]=R3	// QImode move
	R4=[bp+6]	// QImode move
	R3=[R4]	// QImode move
	R4=R1	// QImode move
	[R4]=R3	// QImode move
.debug
	.dw '.stabn 0x44,0,233,',0,0
	.dd LM90-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM90:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,234,',0,0
	.dd LM91-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM91:
	R1=0	// QImode move
	pc=L33	// Indirect jump
.debug
	.dw '.stabn 0x44,0,235,',0,0
	.dd LM92-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM92:
LBE4:
.debug
	.dw '.stabn 0x44,0,235,',0,0
	.dd LM93-_OSSemQuery
	.dw 0x0d,0x0a
.code
LM93:
L33:

	sp+=8
	pop bp from [sp]
	retf
	.endp	// end of OSSemQuery

.debug
	.dw '.stabs "pevent:p39",160,0,0,11',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "pdata:p42=*34",160,0,0,12',0x0d,0x0a
.CODE
.debug
	.dw '.stabn 0xc0,0,0,',0,0
	.dd LBB4-_OSSemQuery
	.dw 0x0d,0x0a
.code
.debug
	.dw '.stabs "i:21",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "psrc:41",128,0,0,1',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "pdest:41",128,0,0,2',0x0d,0x0a
.CODE
.debug
	.dw '.stabn 0xe0,0,0,',0,0
	.dd LBE4-_OSSemQuery
	.dw 0x0d,0x0a
.code
.debug
	.dw '.stabf ',0,0
	.dd LME5-_OSSemQuery
	.dw 0x0d,0x0a
.code
LME5:
.external _OSEventTaskRdy
.external _OSEventTO
.external _OSSched
.external _OSEventTaskWait
.external _OSTCBCur
.external _OSIntNesting
.external _OSEventWaitListInit
.external _OSEventFreeList
	.end