at91_serial_fixup.h

AT91SAM9260usart485功能的使能驱动

#ifndef AT91_SERIAL_FIXUP_H
#define AT91_SERIAL_FIXUP_H

#define MAP_BASE		0xfff00000
#define MAP_SIZE		(1024*1024)
#define MAP_MASK 		0xfffff

#define DEFAULT_TGGR_VAL	0

/* AT91RM9200 PIO definitions */
//#define AT91_SYS_	0xfffff000
/*#define AT91_US0	0xfffc0000
#define AT91_US1	0xfffc4000
#define AT91_US2	0xfffc8000
#define AT91_US3	0xfffcc000*/

#define AT91C_PIOA_OFFSET 	0xff400
#define AT91C_PIOB_OFFSET 	0xff600
#define AT91C_PIOC_OFFSET 	0xff800
#define AT91C_PIOD_OFFSET 	0xffa00
#define AT91C_PMC_OFFSET	0xffc00
#define AT91C_US0_OFFSET	0xc0000
#define AT91C_US1_OFFSET	0xc4000
#define AT91C_US2_OFFSET	0xc8000
#define AT91C_US3_OFFSET	0xcc000

#define AT91C_PMC_PCER		0x0010

#define AT91C_PIO_PER		0x0000
#define AT91C_PIO_PDR		0x0004
#define AT91C_PIO_OER		0x0010
#define AT91C_PIO_ODR		0x0014
#define AT91C_PIO_SODR		0x0030
#define AT91C_PIO_CODR		0x0034
#define AT91C_PIO_PDSR		0x003c
#define AT91C_PIO_ASR		0x0070
#define AT91C_PIO_BSR		0x0074

#define AT91C_US_CR		0x0000
#define AT91C_US_MR		0x0004
#define AT91C_US_TTGR		0x0028

#define AT91C_PIO_PA0		(1 <<  0)
#define AT91C_PA0_MISO		(AT91C_PIO_PA0) //  SPI Master In Slave
#define AT91C_PA0_PCK3		(AT91C_PIO_PA0) //  PMC Programmable Clock Output 3
#define AT91C_PIO_PA1		(1 <<  1)
#define AT91C_PA1_MOSI		(AT91C_PIO_PA1) //  SPI Master Out Slave
#define AT91C_PA1_PCK0		(AT91C_PIO_PA1) //  PMC Programmable Clock Output 0
#define AT91C_PIO_PA2		(1 <<  2)
#define AT91C_PA2_SPCK		(AT91C_PIO_PA2) //  SPI Serial Clock
#define AT91C_PA2_IRQ4		(AT91C_PIO_PA2) //  AIC Interrupt Input 4
#define AT91C_PIO_PA3		(1 <<  3)
#define AT91C_PA3_NPCS0		(AT91C_PIO_PA3) //  SPI Peripheral Chip Select 0
#define AT91C_PA3_IRQ5		(AT91C_PIO_PA3) //  AIC Interrupt Input 5
#define AT91C_PIO_PA4		(1 <<  4)
#define AT91C_PA4_NPCS1		(AT91C_PIO_PA4) //  SPI Peripheral Chip Select 1
#define AT91C_PA4_PCK1		(AT91C_PIO_PA4) //  PMC Programmable Clock Output 1
#define AT91C_PIO_PA5		(1 <<  5)
#define AT91C_PA5_NPCS2		(AT91C_PIO_PA5) //  SPI Peripheral Chip Select 2
#define AT91C_PA5_TXD3		(AT91C_PIO_PA5) //  USART 3 Transmit Data
#define AT91C_PIO_PA6		(1 <<  6)
#define AT91C_PA6_NPCS3		(AT91C_PIO_PA6) //  SPI Peripheral Chip Select 3
#define AT91C_PA6_RXD3		(AT91C_PIO_PA6) //  USART 3 Receive Data
#define AT91C_PIO_PA7		(1 <<  7)
#define AT91C_PA7_ETXCK_EREFCK	(AT91C_PIO_PA7) //  Ethernet MAC Transmit Clock/Reference Clock
#define AT91C_PA7_PCK2		(AT91C_PIO_PA7) //  PMC Programmable Clock 2
#define AT91C_PIO_PA8		(1 <<  8)
#define AT91C_PA8_ETXEN		(AT91C_PIO_PA8) //  Ethernet MAC Transmit Enable
#define AT91C_PA8_MCCDB		(AT91C_PIO_PA8) //  Multimedia Card B Command
#define AT91C_PIO_PA9		(1 <<  9)
#define AT91C_PA9_ETX0		(AT91C_PIO_PA9) //  Ethernet MAC Transmit Data 0
#define AT91C_PA9_MCDB0		(AT91C_PIO_PA9) //  Multimedia Card B Data 0
#define AT91C_PIO_PA10		(1 << 10)
#define AT91C_PA10_ETX1		(AT91C_PIO_PA10) //  Ethernet MAC Transmit Data 1
#define AT91C_PA10_MCDB1	(AT91C_PIO_PA10) //  Multimedia Card B Data 1
#define AT91C_PIO_PA11		(1 << 11)
#define AT91C_PA11_ECRS_ECRSDV	(AT91C_PIO_PA11) //  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
#define AT91C_PA11_MCDB2	(AT91C_PIO_PA11) //  Multimedia Card B Data 2
#define AT91C_PIO_PA12		(1 << 12)
#define AT91C_PA12_ERX0		(AT91C_PIO_PA12) //  Ethernet MAC Receive Data 0
#define AT91C_PA12_MCDB3	(AT91C_PIO_PA12) //  Multimedia Card B Data 3
#define AT91C_PIO_PA13 		(1 << 13)
#define AT91C_PA13_ERX1		(AT91C_PIO_PA13) //  Ethernet MAC Receive Data 1
#define AT91C_PA13_TCLK0	(AT91C_PIO_PA13) //  Timer Counter 0 external clock input
#define AT91C_PIO_PA14		(1 << 14)
#define AT91C_PA14_ERXER	(AT91C_PIO_PA14) //  Ethernet MAC Receive Error
#define AT91C_PA14_TCLK1	(AT91C_PIO_PA14) //  Timer Counter 1 external clock input
#define AT91C_PIO_PA15		(1 << 15)
#define AT91C_PA15_EMDC		(AT91C_PIO_PA15) //  Ethernet MAC Management Data Clock
#define AT91C_PA15_TCLK2	(AT91C_PIO_PA15) //  Timer Counter 2 external clock input
#define AT91C_PIO_PA16		(1 << 16)
#define AT91C_PA16_EMDIO	(AT91C_PIO_PA16) //  Ethernet MAC Management Data Input/Output
#define AT91C_PA16_IRQ6		(AT91C_PIO_PA16) //  AIC Interrupt input 6
#define AT91C_PIO_PA17		(1 << 17)
#define AT91C_PA17_TXD0		(AT91C_PIO_PA17) //  USART 0 Transmit Data
#define AT91C_PA17_TIOA0	(AT91C_PIO_PA17) //  Timer Counter 0 Multipurpose Timer I/O Pin A
#define AT91C_PIO_PA18		(1 << 18)
#define AT91C_PA18_RXD0		(AT91C_PIO_PA18) //  USART 0 Receive Data
#define AT91C_PA18_TIOB0	(AT91C_PIO_PA18) //  Timer Counter 0 Multipurpose Timer I/O Pin B
#define AT91C_PIO_PA19		(1 << 19)
#define AT91C_PA19_SCK0		(AT91C_PIO_PA19) //  USART 0 Serial Clock
#define AT91C_PA19_TIOA1	(AT91C_PIO_PA19) //  Timer Counter 1 Multipurpose Timer I/O Pin A
#define AT91C_PIO_PA20		(1 << 20)
#define AT91C_PA20_CTS0		(AT91C_PIO_PA20) //  USART 0 Clear To Send
#define AT91C_PA20_TIOB1	(AT91C_PIO_PA20) //  Timer Counter 1 Multipurpose Timer I/O Pin B
#define AT91C_PIO_PA21		(1 << 21)
#define AT91C_PA21_RTS0		(AT91C_PIO_PA21) //  USART 0 Ready To Send
#define AT91C_PA21_TIOA2	(AT91C_PIO_PA21) //  Timer Counter 2 Multipurpose Timer I/O Pin A
#define AT91C_PIO_PA22		(1 << 22)
#define AT91C_PA22_RXD2		(AT91C_PIO_PA22) //  USART 2 Receive Data
#define AT91C_PA22_TIOB2	(AT91C_PIO_PA22) //  Timer Counter 2 Multipurpose Timer I/O Pin B
#define AT91C_PIO_PA23		(1 << 23)
#define AT91C_PA23_TXD2		(AT91C_PIO_PA23) //  USART 2 Transmit Data
#define AT91C_PA23_IRQ3		(AT91C_PIO_PA23) //  Interrupt input 3
#define AT91C_PIO_PA24		(1 << 24)
#define AT91C_PA24_SCK2		(AT91C_PIO_PA24) //  USART 2 Serial Clock
#define AT91C_PA24_PCK1		(AT91C_PIO_PA24) //  PMC Programmable Clock Output 1
#define AT91C_PIO_PA25		(1 << 25)
#define AT91C_PA25_TWD		(AT91C_PIO_PA25) //  TWI Two-wire Serial Data
#define AT91C_PA25_IRQ2		(AT91C_PIO_PA25) //  Interrupt input 2
#define AT91C_PIO_PA26		(1 << 26)
#define AT91C_PA26_TWCK		(AT91C_PIO_PA26) //  TWI Two-wire Serial Clock
#define AT91C_PA26_IRQ1		(AT91C_PIO_PA26) //  Interrupt input 1
#define AT91C_PIO_PA27		(1 << 27)
#define AT91C_PA27_MCCK		(AT91C_PIO_PA27) //  Multimedia Card Clock
#define AT91C_PA27_TCLK3	(AT91C_PIO_PA27) //  Timer Counter 3 External Clock Input
#define AT91C_PIO_PA28		(1 << 28)
#define AT91C_PA28_MCCDA	(AT91C_PIO_PA28) //  Multimedia Card A Command
#define AT91C_PA28_TCLK4	(AT91C_PIO_PA28) //  Timer Counter 4 external Clock Input
#define AT91C_PIO_PA29		(1 << 29)
#define AT91C_PA29_MCDA0	(AT91C_PIO_PA29) //  Multimedia Card A Data 0
#define AT91C_PA29_TCLK5	(AT91C_PIO_PA29) //  Timer Counter 5 external clock input
#define AT91C_PIO_PA30		(1 << 30)
#define AT91C_PA30_DRXD		(AT91C_PIO_PA30) //  DBGU Debug Receive Data
#define AT91C_PA30_CTS2		(AT91C_PIO_PA30) //  USART 2 Clear To Send
#define AT91C_PIO_PA31		(1 << 31)
#define AT91C_PA31_DTXD		(AT91C_PIO_PA31) //  DBGU Debug Transmit Data
#define AT91C_PA31_RTS2		(AT91C_PIO_PA31) //  USART 2 Ready To Send

#define AT91C_PIO_PB0		(1 <<  0)
#define AT91C_PB0_TF0		(AT91C_PIO_PB0) //  SSC Transmit Frame Sync 0
#define AT91C_PB0_RTS3		(AT91C_PIO_PB0) //  USART 3 Ready To Send
#define AT91C_PIO_PB1		(1 <<  1)
#define AT91C_PB1_TK0		(AT91C_PIO_PB1) //  SSC Transmit Clock 0
#define AT91C_PB1_CTS3		(AT91C_PIO_PB1) //  USART 3 Clear To Send
#define AT91C_PIO_PB2		(1 <<  2)
#define AT91C_PB2_TD0		(AT91C_PIO_PB2) //  SSC Transmit data
#define AT91C_PB2_SCK3		(AT91C_PIO_PB2) //  USART 3 Serial Clock
#define AT91C_PIO_PB3		(1 <<  3)
#define AT91C_PB3_RD0		(AT91C_PIO_PB3) //  SSC Receive Data
#define AT91C_PB3_MCDA1		(AT91C_PIO_PB3) //  Multimedia Card A Data 1
#define AT91C_PIO_PB4		(1 <<  4)
#define AT91C_PB4_RK0		(AT91C_PIO_PB4) //  SSC Receive Clock
#define AT91C_PB4_MCDA2		(AT91C_PIO_PB4) //  Multimedia Card A Data 2
#define AT91C_PIO_PB5		(1 <<  5)
#define AT91C_PB5_RF0		(AT91C_PIO_PB5) //  SSC Receive Frame Sync 0
#define AT91C_PB5_MCDA3		(AT91C_PIO_PB5) //  Multimedia Card A Data 3
#define AT91C_PIO_PB6		(1 <<  6)
#define AT91C_PB6_TF1		(AT91C_PIO_PB6) //  SSC Transmit Frame Sync 1
#define AT91C_PB6_TIOA3		(AT91C_PIO_PB6) //  Timer Counter 4 Multipurpose Timer I/O Pin A
#define AT91C_PIO_PB7		(1 <<  7)
#define AT91C_PB7_TK1		(AT91C_PIO_PB7) //  SSC Transmit Clock 1
#define AT91C_PB7_TIOB3		(AT91C_PIO_PB7) //  Timer Counter 3 Multipurpose Timer I/O Pin B
#define AT91C_PIO_PB8		(1 <<  8)
#define AT91C_PB8_TD1		(AT91C_PIO_PB8) //  SSC Transmit Data 1
#define AT91C_PB8_TIOA4		(AT91C_PIO_PB8) //  Timer Counter 4 Multipurpose Timer I/O Pin A
#define AT91C_PIO_PB9		(1 <<  9)
#define AT91C_PB9_RD1		(AT91C_PIO_PB9) //  SSC Receive Data 1
#define AT91C_PB9_TIOB4		(AT91C_PIO_PB9) //  Timer Counter 4 Multipurpose Timer I/O Pin B
#define AT91C_PIO_PB10		(1 << 10)
#define AT91C_PB10_RK1		(AT91C_PIO_PB10) //  SSC Receive Clock 1
#define AT91C_PB10_TIOA5	(AT91C_PIO_PB10) //  Timer Counter 5 Multipurpose Timer I/O Pin A
#define AT91C_PIO_PB11		(1 << 11)
#define AT91C_PB11_RF1		(AT91C_PIO_PB11) //  SSC Receive Frame Sync 1
#define AT91C_PB11_TIOB5	(AT91C_PIO_PB11) //  Timer Counter 5 Multipurpose Timer I/O Pin B
#define AT91C_PIO_PB12		(1 << 12)
#define AT91C_PB12_TF2		(AT91C_PIO_PB12) //  SSC Transmit Frame Sync 2
#define AT91C_PB12_ETX2		(AT91C_PIO_PB12) //  Ethernet MAC Transmit Data 2
#define AT91C_PIO_PB13		(1 << 13)
#define AT91C_PB13_TK2		(AT91C_PIO_PB13) //  SSC Transmit Clock 2
#define AT91C_PB13_ETX3		(AT91C_PIO_PB13) //  Ethernet MAC Transmit Data 3
#define AT91C_PIO_PB14		(1 << 14)
#define AT91C_PB14_TD2		(AT91C_PIO_PB14) //  SSC Transmit Data 2
#define AT91C_PB14_ETXER	(AT91C_PIO_PB14) //  Ethernet MAC Transmikt Coding Error
#define AT91C_PIO_PB15		(1 << 15)
#define AT91C_PB15_RD2		(AT91C_PIO_PB15) //  SSC Receive Data 2
#define AT91C_PB15_ERX2		(AT91C_PIO_PB15) //  Ethernet MAC Receive Data 2
#define AT91C_PIO_PB16		(1 << 16)
#define AT91C_PB16_RK2		(AT91C_PIO_PB16) //  SSC Receive Clock 2
#define AT91C_PB16_ERX3		(AT91C_PIO_PB16) //  Ethernet MAC Receive Data 3
#define AT91C_PIO_PB17		(1 << 17)
#define AT91C_PB17_RF2		(AT91C_PIO_PB17) //  SSC Receive Frame Sync 2
#define AT91C_PB17_ERXDV	(AT91C_PIO_PB17) //  Ethernet MAC Receive Data Valid
#define AT91C_PIO_PB18		(1 << 18)
#define AT91C_PB18_RI1		(AT91C_PIO_PB18) //  USART 1 Ring Indicator
#define AT91C_PB18_ECOL		(AT91C_PIO_PB18) //  Ethernet MAC Collision Detected
#define AT91C_PIO_PB19		(1 << 19)
#define AT91C_PB19_DTR1		(AT91C_PIO_PB19) //  USART 1 Data Terminal ready
#define AT91C_PB19_ERXCK	(AT91C_PIO_PB19) //  Ethernet MAC Receive Clock
#define AT91C_PIO_PB20		(1 << 20)
#define AT91C_PB20_TXD1		(AT91C_PIO_PB20) //  USART 1 Transmit Data
#define AT91C_PIO_PB21		(1 << 21)