📄 processor.mif
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-- Copyright (C) 1991-2007 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files from any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
-- Quartus II generated Memory Initialization File (.mif)
WIDTH=16;
DEPTH=32;
ADDRESS_RADIX=UNS;
DATA_RADIX=HEX;
CONTENT BEGIN
0 : E000;
1 : 3019;
2 : E000;
3 : 301A;
4 : 4019;
5 : 601A;
6 : C010;
7 : D00C;
8 : 401A;
9 : 6019;
10 : 301A;
11 : D004;
12 : 2019;
13 : 601A;
14 : 3019;
15 : D004;
16 : 4019;
17 : F000;
[18..31] : 0000;
END;
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