📄 cdma2.mdl
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InputType "Vector"
ElementSrc "Internal"
Elements "[2:63]"
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BlockType Reference
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ic "0"
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Block {
BlockType Reference
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ShowName off
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SourceType "Unipolar to Bipolar Converter"
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SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
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BlockType Reference
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RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
relop ">="
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Orientation "down"
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BlockType Reference
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Orientation "up"
NamePlacement "alternate"
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SourceType "PN Sequence Generator"
poly "[6 5 0]"
ini_sta "[0 0 1 0 0 1]"
shift "0"
Ts "(1e-6)/63"
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InputSameDT off
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Block {
BlockType Sum
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Inputs "+"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutScaling "2^-10"
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BlockType Reference
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SourceBlock "dspbuff3/Unbuffer"
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ic "0"
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Block {
BlockType Reference
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Ports [1, 1]
Position [179, 260, 241, 300]
Orientation "up"
NamePlacement "alternate"
ShowName off
SourceBlock "commutil2/Unipolar to\nBipolar\nConverter"
SourceType "Unipolar to Bipolar Converter"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
M "2"
polarity "Negative"
dataType "Same as input"
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Block {
BlockType Outport
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IconDisplay "Port number"
BusOutputAsStruct off
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Block {
BlockType Outport
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Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
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Block {
BlockType Outport
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IconDisplay "Port number"
BusOutputAsStruct off
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Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Sum of\nElements"
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Line {
SrcBlock "Sum of\nElements"
SrcPort 1
DstBlock "Complex to\nMagnitude-Angle"
DstPort 1
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SrcBlock "Complex to\nMagnitude-Angle"
SrcPort 1
DstBlock "Unbuffer2"
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Line {
SrcBlock "Compare"
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Points [20, 0]
Branch {
DstBlock "Data Type \nConversion1"
DstPort 1
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Branch {
DstBlock "Data Type \nConversion3"
DstPort 1
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Line {
SrcBlock "Unipolar to\nBipolar\nConverter"
SrcPort 1
Points [0, -45]
DstBlock "Buffer1"
DstPort 1
}
Line {
SrcBlock "Buffer1"
SrcPort 1
Points [35, 0; 0, -65]
DstBlock "Product"
DstPort 2
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Line {
SrcBlock "Buffer2"
SrcPort 1
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "PN Sequence2"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter"
DstPort 1
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Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Buffer2"
DstPort 1
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Line {
SrcBlock "Data Type \nConversion1"
SrcPort 1
DstBlock "Out1"
DstPort 1
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Line {
SrcBlock "Data Type \nConversion2"
SrcPort 1
DstBlock "Out2"
DstPort 1
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Line {
SrcBlock "Buffer3"
SrcPort 1
DstBlock "Out3"
DstPort 1
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Line {
SrcBlock "Data Type \nConversion3"
SrcPort 1
Points [0, 45]
DstBlock "Buffer3"
DstPort 1
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Line {
SrcBlock "Unbuffer2"
SrcPort 1
Points [25, 0]
Branch {
DstBlock "Compare"
DstPort 1
}
Branch {
Points [0, 95]
DstBlock "Data Type \nConversion2"
DstPort 1
}
}
Annotation {
Position [530, 146]
UseDisplayTextAsClickCallback off
}
}
}
Line {
SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
DstBlock "BPSK\nModor\nBaseband"
DstPort 1
}
Line {
SrcBlock "AWGN\nChannel"
SrcPort 1
DstBlock "time-syn"
DstPort 1
}
Line {
SrcBlock "PN Sequence1"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter"
DstPort 1
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Line {
SrcBlock "BPSK\nModor\nBaseband"
SrcPort 1
Points [15, 0; 0, 30]
DstBlock "Product"
DstPort 1
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Line {
SrcBlock "Unipolar to\nBipolar\nConverter"
SrcPort 1
Points [20, 0; 0, -30]
DstBlock "Product"
DstPort 2
}
Line {
SrcBlock "Multipath Rayleigh\nFading Channel"
SrcPort 1
DstBlock "AWGN\nChannel"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Multipath Rayleigh\nFading Channel"
DstPort 1
}
Line {
SrcBlock "time-syn"
SrcPort 1
DstBlock "Scope1"
DstPort 1
}
Line {
SrcBlock "time-syn"
SrcPort 2
DstBlock "Scope2"
DstPort 1
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Line {
SrcBlock "time-syn"
SrcPort 3
Points [25, 0]
Branch {
Points [0, 150]
DstBlock "Selector1"
DstPort 1
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Branch {
DstBlock "Selector"
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Line {
SrcBlock "Constant"
SrcPort 1
Points [20, 0; 0, 30]
DstBlock "Error Rate\nCalculation"
DstPort 1
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Line {
SrcBlock "Selector"
SrcPort 1
DstBlock "Convert 2-D to 1-D"
DstPort 1
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Line {
SrcBlock "Error Rate\nCalculation"
SrcPort 1
DstBlock "PC"
DstPort 1
}
Line {
SrcBlock "Convert 2-D to 1-D"
SrcPort 1
DstBlock "Error Rate\nCalculation"
DstPort 2
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Line {
SrcBlock "Constant1"
SrcPort 1
Points [20, 0; 0, 20]
DstBlock "Error Rate\nCalculation1"
DstPort 1
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SrcBlock "Error Rate\nCalculation1"
SrcPort 1
DstBlock "PE"
DstPort 1
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SrcBlock "Convert 2-D to 1-D1"
SrcPort 1
DstBlock "Error Rate\nCalculation1"
DstPort 2
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Line {
SrcBlock "Selector1"
SrcPort 1
DstBlock "Unbuffer2"
DstPort 1
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Line {
SrcBlock "Unbuffer2"
SrcPort 1
DstBlock "Convert 2-D to 1-D1"
DstPort 1
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MatData {
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DataRecord {
Tag DataTag0
Data " %)30 . > 8 ( 0 % "
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}
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