nand.h

来自「Centrality Atlas II development software」· C头文件 代码 · 共 136 行

/*
 * $QNXLicenseC: 
 * Copyright 2007,2008, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */



#ifndef __NAND_H__
#define __NAND_H__
#include "ipl.h"
#include <hw/inout.h>
#include <stdint.h>
#include "atlasii.h"


#define ATLASII_IOBRDG_FLUSH		0xB0000804

#define ATLASII_SM_WAIT			0x04
#define ATLASII_SM_BANK_SEL		0x08
#define ATLASII_SM_ADD_NUM		0x0C
#define ATLASII_SM_CMD			0x10
#define ATLASII_SM_LOW_ADDR		0x14
#define ATLASII_SM_HIGH_ADDR		0x18
#define ATLASII_SM_PAGE_SIZE		0x1C
#define ATLASII_SM_INT_EN		0x20
#define ATLASII_SM_INT_STATUS		0x24
#define ATLASII_SM_CTRL			0x28
#define ATLASII_SM_ECC_SET		0x2C
#define ATLASII_SM_ECC_AREA1		0x30
#define ATLASII_SM_ECC_AREA2		0x34
#define ATLASII_SM_DMA_IO_CTRL	0xF00
#define ATLASII_SM_DMA_IO_LEN		0xF04
#define ATLASII_SM_FIFO_CTRL 		0xF08
#define ATLASII_SM_FIFO_LEVEL_CHK	0xF0C
#define ATLASII_SM_FIFO_OP 		0xF10
#define ATLASII_SM_FIFO_STATUS	0xF14
#define ATLASII_SM_FIFO_DATA 		0xF18

#define NAND_STATUS_READY		0x01
#define NAND_STATUS_WT_CMD		0x02
#define NAND_STATUS_WT_IO		0x04
#define NAND_STATUS_WT_FIFO		0x08

#define NAND_MODE_CMD			0x10
#define NAND_MODE_IO_READ		0x3
#define NAND_MODE_IO_WRITE		0x1


// Nand device specific data structures
//
#define NANDCMD_SPAREREAD		0x50
#define NANDCMD_READ			0x00
#define NANDCMD_PROGRAM			0x80
#define NANDCMD_PROGRAMCONFIRM	0x10
#define NANDCMD_ERASE			0x60
#define NANDCMD_ERASECONFIRM		0xD0
#define NANDCMD_IDREAD			0x90
#define NANDCMD_STATUSREAD		0x70
#define NANDCMD_RESET			0xFF

#define DATASIZE					512
#define SPARESIZE					16
#define PAGESIZE					(DATASIZE + SPARESIZE)
#define PAGES2BLK					32

// These timeouts are very generous.
#define MAX_RESET_USEC				200*600		// 600us
#define MAX_READ_USEC				200*150      //  50us
#define MAX_POST_USEC				200*2000    //   2ms
#define MAX_ERASE_USEC				200*10000	//  10ms

typedef struct nand_chip {
	unsigned		iobase;
	unsigned		io_data;
	unsigned		io_address;
	unsigned		io_command;
	unsigned		io_brdg;
	unsigned 		numblks;
	unsigned 		addrcycles;
	unsigned 		sparesize; //     = SPARESIZE * PAGES2CLUSTER;
	unsigned		blksize; //       = (dev->clustersize + SPARESIZE) * dev->clusters2blk;
} NAND_CHIP;

NAND_CHIP chip_dev;
NAND_CHIP *dev;

typedef struct _PageInfo
{
	uint32_t	sequence;			// Sequence number
	uint8_t	clusterhi;			// High order 8 bits of cluster
	uint8_t	status;				// Factory set - FF means good. Must be offset 6!!! (stupid)
	uint16_t	fid;					// File id
	uint16_t	clusterlo;			// Low order 16 bits of logical cluster
	uint16_t	crcdatalo;			// Low order 16 bits of crc for readcluster()
	uint8_t	nclusters;			// Number of clusters
	uint8_t	erasesig;
	uint16_t	crctrans;			// Crc for readtrans()
}PageInfo, *PPageInfo;

#define ERASESIG	0xA0

unsigned nand_init();
unsigned nand_wait_INT(NAND_CHIP *dev, uint32_t usec, uint32_t sts);
void nand_write_cmd(NAND_CHIP *dev, int command);
int nand_read_flashid(NAND_CHIP *dev, uint8_t *id, int data_cycles);
int nand_read_status(NAND_CHIP *dev, uint8_t *databuffer);
int nand_read_page(NAND_CHIP *dev, unsigned page, uint8_t *databuffer, int data_cycles, int op);
int nand_write_page(NAND_CHIP *dev, unsigned page, uint8_t *databuffer, int data_cycles, int op);
int nand_erase_blk(NAND_CHIP *dev, unsigned blk);
int nand_write_data(NAND_CHIP *dev, uint8_t *databuffer, int data_cycles);
int nand_read_data(NAND_CHIP *dev, uint8_t *databuffer, int data_cycles);
unsigned GetBlockStatus(NAND_CHIP *dev, unsigned blockID);
unsigned read_image_from_nand(unsigned start_block, unsigned dst);
unsigned upgrade_nand_flash(unsigned start_block, unsigned src);
unsigned upgrade_IPL(unsigned src);
unsigned nand_write_config(unsigned src);
unsigned nand_read_config(unsigned dst);

#endif /*__NAND_H__*/