atlasii.h

Centrality Atlas II development software

/*
 * $QNXLicenseC: 
 * Copyright 2007,2008, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */


#ifndef _ATLASII_H_
#define _ATLASII_H_


#define IS_DDR()                                (1 == (PWR_PAD_CTRL & 3))


#define SDRAM_BASE                              0xC0000000
#define PERIPHERAL_BASE                         0x80000000
#define SYSTEM_BASE                             0x90000000
#define MEM_CONTROL_BASE                        0xa0000000
#define DMA_CONTROL_BASE                        0xb0000000
#define LCD_BASE                                0xb8000000
#define PCMCIA_SOCKET_1                         0x30000000
#define PCMCIA_SOCKET_O                         0x20000000
#define SIM_BASE                                0xfff00000
#define EXT_PIO_BASE                            0x14000000
#define ROM_ADD_CS0_BASE                        0x10000000
#define PCI_DEVICE_BASE                         0x50000000
#define _DSP_SHARED_MEMORY                      0x48000000

#define _USBOTG_MODULE_BASE                     0x57f00000 // 1  MB USB (io) registers
#define _IDE_MODULE_BASE                        0x57d00000 // 1  MB IDE (io) registers
#define _PCMCIA_MODULE_BASE                     0x57c00000 // 1  MB PCMCIA (io) registers
#define _EPCI_MODULE_BASE                       0x57b00000 // 1  MB External PCI (io) registers
#define _PCI_ROM_MODULE_BASE                    0x57a00000 // 1  MB PCI ROM(io) registers
#define _PCI_COPY_MODULE_BASE                   0x57900000 // 1  MB PCI_COPY(io) register
#define _YUV_CHG_MODULE_BASE                    0x57800000 // 1  MB YUV_CHG(io) register
#define _IPOLATE_MODULE_BASE                    0x57700000 // 1  MB IPOLATE(io) register

#define _SD_MODULE_BASE                         0x56000000 // 1  MB SDIO(io) registers
#define PCMCIA_IO_PHYSICAL_BASE                 0x57C00000

#define ROM_ADD_CS2_BASE                        (ROM_ADD_CS0_BASE + 0x8000000)
#define ROM_ADD_CS3_BASE                        (ROM_ADD_CS0_BASE + 0xC000000)

#define ROM_ADD_CS1_BASE                        EXT_PIO_BASE

#define _RISC_MODULE_BASE                       (SYSTEM_BASE)
#define _DSP_MODULE_BASE                        (SYSTEM_BASE + 0x10000)
#define _INT_MODULE_BASE                        (SYSTEM_BASE + 0x20000)
#define _RSC_MODULE_BASE                        (SYSTEM_BASE + 0x30000)
#define _RTC_MODULE_BASE                        (SYSTEM_BASE + 0x40000)
#define _OST_MODULE_BASE                        (SYSTEM_BASE + 0x50000)
#define _POWER_MODULE_BASE                      (SYSTEM_BASE + 0x60000)
#define PWR_SLEEP_STATUS_OFFSET      0x0C
#define PWR_CLK_SWITCH_OFFSET        0x20
#define PWR_PLL1_CONFIG_OFFSET       0x28
#define PWR_PLL2_CONFIG_OFFSET       0x2C
#define PWR_CLK_ENABLE_OFFSET	     0x30
#define PWR_CLK_RATIO_OFFSET         0x40
#define PWR_PAD_CTRL_OFFSET				0x48
#define PWR_DELAY_CTRL0_OFFSET       0x4C
#define PWR_DELAY_CTRL1_OFFSET       0x50

#define _RESET_MODULE_BASE                      (SYSTEM_BASE + 0x70000)

#define _MEMORY_MODULE_BASE                     (MEM_CONTROL_BASE)
#define MEMC_TYPE_OFFSET             0x00
#define MEMC_TIMING_OFFSET           0x04
#define MEMC_PWR_OFFSET              0x08
#define MEMC_MODE_OFFSET             0x0C
#define MEMC_EXTEND_OFFSET           0x10
#define MEMC_START_OFFSET            0x14

#define _ROM_MODULE_BASE                        (MEM_CONTROL_BASE + 0x10000)
#define _ARBITER_MODULE_BASE                    (MEM_CONTROL_BASE + 0x20000)

#define _GPIO_MODULE_BASE                       (PERIPHERAL_BASE + 0x90000)
#define _SER0_MODULE_BASE                       (PERIPHERAL_BASE + 0x00000)
#define _SER1_MODULE_BASE                       (PERIPHERAL_BASE + 0x10000)
#define _SER2_MODULE_BASE                       (PERIPHERAL_BASE + 0x20000)
#define _SER3_MODULE_BASE                       (PERIPHERAL_BASE + 0x30000)
#define _SER4_MODULE_BASE                       (PERIPHERAL_BASE + 0x40000)
#define _SER5_MODULE_BASE                       (PERIPHERAL_BASE + 0x50000)
#define _CODEC_MODULE_BASE                      (PERIPHERAL_BASE + 0x60000)
#define _SMDF_MODULE_BASE                       (PERIPHERAL_BASE + 0x70000)
#define _CAM_MODULE_BASE                        (PERIPHERAL_BASE + 0x80000)
#define _HOST_MODULE_BASE                       (PERIPHERAL_BASE + 0x90000)
#define _GPS_MODULE_BASE                        (PERIPHERAL_BASE + 0xa0000)
#define _PCI_MODULE_BASE                        (PERIPHERAL_BASE + 0xc0000)
#define _CAN0_MODULE_BASE                       (PERIPHERAL_BASE + 0xd0000)
#define _CAN1_MODULE_BASE                       (PERIPHERAL_BASE + 0xe0000)
#define _PWM_MODULE_BASE                        (PERIPHERAL_BASE + 0xf0000)

#define _DMA_MODULE_BASE                        DMA_CONTROL_BASE
#define _LCD_MODULE_BASE                        LCD_BASE


#define SYS_CS_PLL1                  0x00000001
#define USB_CS_PLL2                  0x00000008

#define TLCD_LED1                    0X14000a00
#define TLCD_LED2                    0X14000c00

#define LED_SHOW_0                   0x40
#define LED_SHOW_1                   0x79
#define LED_SHOW_2                   0x24
#define LED_SHOW_3                   0x30
#define LED_SHOW_4                   0x19
#define LED_SHOW_5                   0x12
#define LED_SHOW_6                   0x02
#define LED_SHOW_7                   0x78
#define LED_SHOW_8                   0x00
#define LED_SHOW_9                   0x18
#define LED_SHOW_A                   0x08
#define LED_SHOW_B                   0x03
#define LED_SHOW_C                   0x46
#define LED_SHOW_D                   0x21
#define LED_SHOW_E                   0x06
#define LED_SHOW_F                   0x0e
#define LED_SHOW_OFF                 0xff



/***************************************************************************************\
| Risc interface registers
\***************************************************************************************/
#define RISCINT_FIFO_FLUSH                      (*(volatile unsigned int *)_RISC_MODULE_BASE)
#define RISCINT_MEM_SIZE                        (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0004))
#define RISCINT_ROM_SIZE                        (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0008))
#define RISCINT_BOOT_UP                         (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x000c))
#define RISCINT_WAIT1                           (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0010))
#define RISCINT_WAIT2                           (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0014))
#define RISCINT_WIDTH                           (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0018))
#define RISCINT_TIMEOUT                         (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x001C))
#define RISCINT_TIMEOUT_INT                     (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0020))
#define RISCINT_PREFETCH_EN                     (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0024))
#define RISCINT_PCIROM_EN                       (*(volatile unsigned int *)(_RISC_MODULE_BASE + 0x0028))

/***************************************************************************************\
| Interrupt controller registers
\***************************************************************************************/
#define INT_PENDING                             (*(volatile unsigned int *)_INT_MODULE_BASE)
#define INT_IRQ_PENDING                         (*(volatile unsigned int *)(_INT_MODULE_BASE + 0x0004))