init_intrinfo.c

Centrality Atlas II development software

/*
 * $QNXLicenseC: 
 * Copyright 2007,2008, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */




/*
 * Centrality Atlasii interrupt controller support.
 */

#include "startup.h"
#include "atlasii.h"
#include "gpio.h"

extern struct callout_rtn interrupt_mask_atlasii;
extern struct callout_rtn interrupt_unmask_atlasii;
extern struct callout_rtn interrupt_id_atlasii;
extern struct callout_rtn interrupt_eoi_atlasii;
extern struct callout_rtn interrupt_mask_atlasii_dma;
extern struct callout_rtn interrupt_unmask_atlasii_dma;
extern struct callout_rtn interrupt_id_atlasii_dma;
extern struct callout_rtn interrupt_eoi_atlasii_dma;
extern struct callout_rtn interrupt_mask_atlasii_gpio0;
extern struct callout_rtn interrupt_unmask_atlasii_gpio0;
extern struct callout_rtn interrupt_id_atlasii_gpio0;
extern struct callout_rtn interrupt_eoi_atlasii_gpio0;
extern struct callout_rtn interrupt_mask_atlasii_timer1_5;
extern struct callout_rtn interrupt_unmask_atlasii_timer1_5;
extern struct callout_rtn interrupt_id_atlasii_timer1_5;
extern struct callout_rtn interrupt_eoi_atlasii_timer1_5;
extern struct callout_rtn interrupt_mask_atlasii_usp4_7;
extern struct callout_rtn interrupt_unmask_atlasii_usp4_7;
extern struct callout_rtn interrupt_id_atlasii_usp4_7;
extern struct callout_rtn interrupt_eoi_atlasii_usp4_7;
extern struct callout_rtn interrupt_mask_atlasii_cam_i2c;
extern struct callout_rtn interrupt_unmask_atlasii_cam_i2c;
extern struct callout_rtn interrupt_id_atlasii_cam_i2c;
extern struct callout_rtn interrupt_eoi_atlasii_cam_i2c;



const static struct startup_intrinfo	intrs[] = {
	/* primary interrupt controller */
	{	_NTO_INTR_CLASS_EXTERNAL, 		/* vector base */
		32,								/* number of vectors */
		_NTO_INTR_SPARE,				/* cascade vector */
		0,								/* CPU vector base */
		0,								/* CPU vector stride */
		0,								/* flags */
		{ INTR_GENFLAG_LOAD_SYSPAGE,	0, &interrupt_id_atlasii},
		{ INTR_GENFLAG_LOAD_SYSPAGE | INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_atlasii},
		&interrupt_mask_atlasii,		/* mask   callout */
		&interrupt_unmask_atlasii,		/* unmask callout */
		0,								/* config callout */
	},
	/* DMA interrupts */
	{	_NTO_INTR_CLASS_EXTERNAL + 100, 	/* vector base */
		12,							/* number of vectors */
		25,								/* cascade vector */
		0,								/* CPU vector base */
		0,								/* CPU vector stride */
		0,								/* flags */
		{ INTR_GENFLAG_LOAD_SYSPAGE,	0, &interrupt_id_atlasii_dma},
		{ INTR_GENFLAG_LOAD_SYSPAGE | INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_atlasii_dma},
		&interrupt_mask_atlasii_dma,		/* mask   callout */
		&interrupt_unmask_atlasii_dma,		/* unmask callout */
		0,								/* config callout */
	},

	/* GPIO interrupt group 0 */
	{	_NTO_INTR_CLASS_EXTERNAL+200,	 /* vector base */
		32,								/* number of vectors */
		0,								/* cascade vector */
		0,								/* CPU vector base */
		0,								/* CPU vector stride */
		0,								/* flags */
		{ INTR_GENFLAG_LOAD_SYSPAGE,	0, &interrupt_id_atlasii_gpio0},
		{ INTR_GENFLAG_LOAD_SYSPAGE | INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_atlasii_gpio0},
		&interrupt_mask_atlasii_gpio0,		/* mask   callout */
		&interrupt_unmask_atlasii_gpio0,	/* unmask callout */
		0,								/* config callout */
	},
	/* timer 1-5 interrupt */
	{	_NTO_INTR_CLASS_EXTERNAL+300,	 /* vector base */
		5,								/* number of vectors */
		29,								/* cascade vector */
		0,								/* CPU vector base */
		0,								/* CPU vector stride */
		0,								/* flags */
		{ INTR_GENFLAG_LOAD_SYSPAGE,	0, &interrupt_id_atlasii_timer1_5},
		{ INTR_GENFLAG_LOAD_SYSPAGE | INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_atlasii_timer1_5},
		&interrupt_mask_atlasii_timer1_5,		/* mask   callout */
		&interrupt_unmask_atlasii_timer1_5,	/* unmask callout */
		0,								/* config callout */
	},
	/* USP 4-7 interrupt */
	{	_NTO_INTR_CLASS_EXTERNAL+400,	 /* vector base */
		4,								/* number of vectors */
		26,								/* cascade vector */
		0,								/* CPU vector base */
		0,								/* CPU vector stride */
		0,								/* flags */
		{ INTR_GENFLAG_LOAD_SYSPAGE,	0, &interrupt_id_atlasii_usp4_7},
		{ INTR_GENFLAG_LOAD_SYSPAGE | INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_atlasii_usp4_7},
		&interrupt_mask_atlasii_usp4_7,		/* mask   callout */
		&interrupt_unmask_atlasii_usp4_7,	/* unmask callout */
		0,								/* config callout */
	},
	/* Camera/I2c interrupt */
	{	_NTO_INTR_CLASS_EXTERNAL+500,	 /* vector base */
		2,								/* number of vectors */
		15,								/* cascade vector */
		0,								/* CPU vector base */
		0,								/* CPU vector stride */
		0,								/* flags */
		{ INTR_GENFLAG_LOAD_SYSPAGE,	0, &interrupt_id_atlasii_cam_i2c},
		{ INTR_GENFLAG_LOAD_SYSPAGE | INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_atlasii_cam_i2c},
		&interrupt_mask_atlasii_cam_i2c,		/* mask   callout */
		&interrupt_unmask_atlasii_cam_i2c,	/* unmask callout */
		0,								/* config callout */
	},
};

void
init_intrinfo()
{
	//Mask all interrupt
	INT_RISC_MASK = 0;
	INT_RISC_MASK_EXT = 0;
	INT_RISC_LEVEL = 0; //all to IRQ
	//set gpio 0 --power sleep
	ConfigGPIO(GPIO_CTRL, 0, GPIO_OUT_EN_B, GPIO_BITCLR, GPIO_WRITE); //set as input
	ConfigGPIO(GPIO_PAD_EN, 0, (1<<0), GPIO_BITSET, GPIO_WRITE); //gpio take control over the pin
	ConfigGPIO(GPIO_CTRL, 0, GPIO_INT_TYPE_B, GPIO_BITCLR, GPIO_WRITE); //Intr type edge trigger
	ConfigGPIO(GPIO_CTRL, 0, GPIO_INT_LT_B, GPIO_BITSET, GPIO_WRITE); //intr level low
	ConfigGPIO(GPIO_CTRL, 0, GPIO_INT_STATUS_B, GPIO_BITSET, GPIO_WRITE); //clear intr
	//set gpio 1--key intr
	ConfigGPIO(GPIO_CTRL, 1, GPIO_OUT_EN_B, GPIO_BITCLR, GPIO_WRITE); //set as input
	ConfigGPIO(GPIO_PAD_EN, 1, (1<<1), GPIO_BITSET, GPIO_WRITE); //gpio take control over the pin
	ConfigGPIO(GPIO_CTRL, 1, GPIO_INT_TYPE_B, GPIO_BITCLR, GPIO_WRITE); //Intr type level trigger
	ConfigGPIO(GPIO_CTRL, 1, GPIO_INT_HT_B, GPIO_BITCLR, GPIO_WRITE); //intr level low
	ConfigGPIO(GPIO_CTRL, 1, GPIO_INT_STATUS_B, GPIO_BITSET, GPIO_WRITE); //clear intr
	//set gpio 2 --Touch Panel Intr
	ConfigGPIO(GPIO_CTRL, 4, GPIO_OUT_EN_B, GPIO_BITCLR, GPIO_WRITE); //set as input
	ConfigGPIO(GPIO_PAD_EN, 0, (1<<4), GPIO_BITSET, GPIO_WRITE); //gpio take control over the pin
	ConfigGPIO(GPIO_CTRL, 4, GPIO_INT_TYPE_B, GPIO_BITCLR, GPIO_WRITE); //Intr type edge trigger
	ConfigGPIO(GPIO_CTRL, 4, GPIO_INT_HT_B, GPIO_BITSET, GPIO_WRITE); //intr falling edge
	ConfigGPIO(GPIO_CTRL, 4, GPIO_INT_STATUS_B, GPIO_BITSET, GPIO_WRITE); //clear intr
	//set gpio 3 --Ethernet Intr
	ConfigGPIO(GPIO_CTRL, 5, GPIO_OUT_EN_B, GPIO_BITCLR, GPIO_WRITE); //set as input
	ConfigGPIO(GPIO_PAD_EN, 0, (1<<5), GPIO_BITSET, GPIO_WRITE); //gpio take control over the pin
	ConfigGPIO(GPIO_CTRL, 5, GPIO_INT_TYPE_B, GPIO_BITCLR, GPIO_WRITE); //Intr type level trigger
	ConfigGPIO(GPIO_CTRL, 5, GPIO_INT_HT_B, GPIO_BITSET, GPIO_WRITE); //intr high level
	ConfigGPIO(GPIO_CTRL, 5, GPIO_INT_STATUS_B, GPIO_BITSET, GPIO_WRITE); //clear intr
	//set gpio 4 --Mouse Intr
	ConfigGPIO(GPIO_CTRL, 6, GPIO_OUT_EN_B, GPIO_BITCLR, GPIO_WRITE); //set as input
	ConfigGPIO(GPIO_PAD_EN, 0, (1<<6), GPIO_BITSET, GPIO_WRITE); //gpio take control over the pin
	ConfigGPIO(GPIO_CTRL, 6, GPIO_INT_TYPE_B, GPIO_BITCLR, GPIO_WRITE); //Intr type level trigger
	ConfigGPIO(GPIO_CTRL, 6, GPIO_INT_HT_B, GPIO_BITSET, GPIO_WRITE); //intr high level
	ConfigGPIO(GPIO_CTRL, 6, GPIO_INT_STATUS, GPIO_BITSET, GPIO_WRITE); //clear intr
	
	add_interrupt_array(intrs, sizeof(intrs));
}