callout_interrupt_atlasii.s

Centrality Atlas II development software

/*
 * $QNXLicenseC: 
 * Copyright 2007,2008, QNX Software Systems.  
 *  
 * Licensed under the Apache License, Version 2.0 (the "License"). You  
 * may not reproduce, modify or distribute this software except in  
 * compliance with the License. You may obtain a copy of the License  
 * at: http://www.apache.org/licenses/LICENSE-2.0  
 *  
 * Unless required by applicable law or agreed to in writing, software  
 * distributed under the License is distributed on an "AS IS" basis,  
 * WITHOUT WARRANTIES OF ANY KIND, either express or implied. 
 * 
 * This file may contain contributions from others, either as  
 * contributors under the License or as licensors under other terms.   
 * Please review this entire file for other proprietary rights or license  
 * notices, as well as the QNX Development Suite License Guide at  
 * http://licensing.qnx.com/license-guide/ for other information. 
 * $ 
 */



/*
 * Centrality Atlas-II specific interrupt callouts.
 *
 * interrupt_id_* and interrupt_eoi_* are copied and intermixed with other
 * kernel code during initialisation.
 *
 * They do not follow normal calling conventions, and must fall through
 * to the end, rather than attempting to perform a return instruction.
 *
 *
 *	r5 - holds the syspageptr				
 *	r6 - holds the intrinfo_entry pointer	
 *	r7 - holds the interrupt mask count	
 *
 * The interrupt_id_* routine returns the (controller-relative) level in r4
 */

#include "callout.ah"
#include "atlasii.h"

/*
 * -----------------------------------------------------------------------
 * Routine to patch callout code
 *
 * On entry:
 *	r0 - physical address of syspage
 *	r1 - virtual  address of syspage
 *	r2 - offset from start of syspage to start of the callout routine
 *	r3 - offset from start of syspage to read/write data used by callout
 * -----------------------------------------------------------------------
 */

interrupt_patch:
	stmdb	sp!,{r4,lr}
	add		r4, r0, r2					// address of callout routine

	/*
	 * Map interrupt controller registers
	 */
	mov		r0, #0x50	// size of interrupt registers
	ldr		r1, Lintr1_base
	bl		callout_io_map

	/*
	 * Patch the callout routine
	 */
	CALLOUT_PATCH	r4, r0, r1, r2, ip
	ldmia	sp!,{r4,pc}

Lintr1_base:	.word	_INT_MODULE_BASE 


/*
 * -----------------------------------------------------------------------
 * Identify interrupt source.
 *
 * Returns interrupt number in r4
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_id_atlasii, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

      mov                r4, #-1

    /*
     * Read pending IRQ interrupts
     */
    ldr     r1, [ip, #0x4]    //INT_PEND
    ldr                r2, [ip, #0x10]  //INT_RISC_MASK
    and                r1, r1, r2

    cmp                r1, #0
    beq                1f                /* glitch */

    mov     r4, #32
    mov     r2, #1

    /*
     * Scan for first set bit
     */
0:  subs    r4, r4, #1
    blt     1f
    tst     r1, r2, lsl r4
    beq     0b

    /*
     * Mask the interrupt
     */
    ldr     r1, [ip, #0x10]  //INT_RISC_MASK
    bic     r1, r1, r2, lsl r4
    str     r1, [ip, #0x10]  //INT_RISC_MASK

1:

CALLOUT_END(interrupt_id_atlasii)


/*
 * -----------------------------------------------------------------------
 * Acknowledge specified interrupt
 *
 * On entry:
 *	r4 contains the interrupt number
 *	r7 contains the interrupt mask count
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_eoi_atlasii, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    /*
     * Only unmask interrupt if mask count is zero
     */

    teq     r7, #0
    bne     0f

    mov		r2, #1
    mov		r2, r2, lsl r4	

    ldr     r1, [ip, #0x10]  //INT_RISC_MASK
    orr     r1, r1, r2
    str     r1, [ip, #0x10]  //INT_RISC_MASK

0:

CALLOUT_END(interrupt_eoi_atlasii)


/*
 * -----------------------------------------------------------------------
 * Mask specified interrupt
 *
 * On entry:
 *	r0 - syspage_ptr
 *	r1 - interrupt number
 *
 * Returns:
 *	r0 - error status
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_mask_atlasii, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    mov     r2, #1
    /*
     * Mask the interrupt
     */
    ldr     r0, [ip, #0x10]  //INT_RISC_MASK
    mov     r2, r2, lsl r1
    bic     r0, r0, r2
    str     r0, [ip, #0x10]  //INT_RISC_MASK

    mov     r0, #0
    mov     pc, lr
CALLOUT_END(interrupt_mask_atlasii)


/*
 * -----------------------------------------------------------------------
 * Unmask specified interrupt
 *
 * On entry:
 *	r0 - syspage_ptr
 *	r1 - interrupt number
 *
 * Returns:
 *	r0 - error status
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_unmask_atlasii, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    mov     r2, #1

    /*
     * Unmask the interrupt
     */
    ldr     r0, [ip, #0x10] //INT_RISC_MASK
    orr     r0, r0, r2, lsl r1
    str     r0, [ip, #0x10] //INT_RISC_MASK

	mov		r0, #0
	mov		pc, lr
CALLOUT_END(interrupt_unmask_atlasii)


/*
 * -----------------------------------------------------------------------
 * Identify interrupt source.
 *
 * Returns interrupt number in r4
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_id_atlasii_timer1_5, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    /*
     * Read pending IRQ interrupts
     */
    ldr     	r1, [ip, #0x38]    //INT_PEND_EXT
    mov	r1, r1, lsr #12
    ldr      r2, [ip, #0x2C]  //INT_RISC_MASK_EXT
    mov	r2, r2, lsr #12
    and     r1, r1, r2

    cmp                r1, #0
    beq                1f                /* glitch */

    mov     r4, #5
    mov     r2, #1

    /*
     * Scan for first set bit start from bit 16
     */
0:  subs    r4, r4, #1
    blt     1f
    tst     r1, r2, lsl r4
    beq     0b

    /*
     * Mask the interrupt
     */
    ldr     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
    add	r4, r4, #12
    bic     r1, r1, r2, lsl r4
    str     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
    subs  r4, r4, #12
   b	2f
1:
	mov r4, #-1
2:
CALLOUT_END(interrupt_id_atlasii_timer1_5)


/*
 * -----------------------------------------------------------------------
 * Acknowledge specified interrupt
 *
 * On entry:
 *	r4 contains the interrupt number
 *	r7 contains the interrupt mask count
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_eoi_atlasii_timer1_5, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    /*
     * Only unmask interrupt if mask count is zero
     */

    teq     r7, #0
    bne     0f

    mov		r2, #1
    add		r4, r4, #12

    ldr     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
    orr     r1, r1, r2, lsl r4
    str     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
0:

CALLOUT_END(interrupt_eoi_atlasii_timer1_5)


/*
 * -----------------------------------------------------------------------
 * Mask specified interrupt
 *
 * On entry:
 *	r0 - syspage_ptr
 *	r1 - interrupt number
 *
 * Returns:
 *	r0 - error status
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_mask_atlasii_timer1_5, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    mov     r2, #1
    /*
     * Mask the interrupt
     */
    add	r1, r1, #12
    ldr     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT
    mov     r2, r2, lsl r1
    bic     r0, r0, r2
    str     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT

    mov     r0, #0
    mov     pc, lr
CALLOUT_END(interrupt_mask_atlasii_timer1_5)


/*
 * -----------------------------------------------------------------------
 * Unmask specified interrupt
 *
 * On entry:
 *	r0 - syspage_ptr
 *	r1 - interrupt number
 *
 * Returns:
 *	r0 - error status
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_unmask_atlasii_timer1_5, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    mov     r2, #1

    /*
     * Unmask the interrupt
     */
    add	r1, r1, #12
    ldr     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT
    orr     r0, r0, r2, lsl r1
    str     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT

	mov		r0, #0
	mov		pc, lr
CALLOUT_END(interrupt_unmask_atlasii_timer1_5)


/*
 * -----------------------------------------------------------------------
 * Identify interrupt source.
 *
 * Returns interrupt number in r4
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_id_atlasii_cam_i2c, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    /*
     * Read pending IRQ interrupts
     */
    ldr     	r1, [ip, #0x38]    //INT_PEND_EXT
    mov	r1, r1, lsr #2
    ldr      r2, [ip, #0x2C]  //INT_RISC_MASK_EXT
    mov	r2, r2, lsr #2
    and     r1, r1, r2

    cmp                r1, #0
    beq                1f                /* glitch */

    mov     r4, #2
    mov     r2, #1

    /*
     * Scan for first set bit start from bit 16
     */
0:  subs    r4, r4, #1
    blt     1f
    tst     r1, r2, lsl r4
    beq     0b

    /*
     * Mask the interrupt
     */
    ldr     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
    add	r4, r4, #2
    bic     r1, r1, r2, lsl r4
    str     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
    subs  r4, r4, #2
   b	2f
1:
	mov r4, #-1
2:
CALLOUT_END(interrupt_id_atlasii_cam_i2c)


/*
 * -----------------------------------------------------------------------
 * Acknowledge specified interrupt
 *
 * On entry:
 *	r4 contains the interrupt number
 *	r7 contains the interrupt mask count
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_eoi_atlasii_cam_i2c, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    /*
     * Only unmask interrupt if mask count is zero
     */

    teq     r7, #0
    bne     0f

    mov		r2, #1
    add		r4, r4, #2

    ldr     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
    orr     r1, r1, r2, lsl r4
    str     r1, [ip, #0x2C]  //INT_RISC_MASK_EXT
0:

CALLOUT_END(interrupt_eoi_atlasii_cam_i2c)


/*
 * -----------------------------------------------------------------------
 * Mask specified interrupt
 *
 * On entry:
 *	r0 - syspage_ptr
 *	r1 - interrupt number
 *
 * Returns:
 *	r0 - error status
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_mask_atlasii_cam_i2c, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    mov     r2, #1
    /*
     * Mask the interrupt
     */
    add	r1, r1, #2
    ldr     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT
    mov     r2, r2, lsl r1
    bic     r0, r0, r2
    str     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT

    mov     r0, #0
    mov     pc, lr
CALLOUT_END(interrupt_mask_atlasii_cam_i2c)


/*
 * -----------------------------------------------------------------------
 * Unmask specified interrupt
 *
 * On entry:
 *	r0 - syspage_ptr
 *	r1 - interrupt number
 *
 * Returns:
 *	r0 - error status
 * -----------------------------------------------------------------------
 */
CALLOUT_START(interrupt_unmask_atlasii_cam_i2c, 0, interrupt_patch)
	/*
	 * Get the interrupt controller base address (patched)
	 */
	mov		ip,     #0x000000ff
	orr		ip, ip, #0x0000ff00
	orr		ip, ip, #0x00ff0000
	orr		ip, ip, #0xff000000

    mov     r2, #1

    /*
     * Unmask the interrupt
     */
    add	r1, r1, #2
    ldr     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT
    orr     r0, r0, r2, lsl r1
    str     r0, [ip, #0x2C]  //INT_RISC_MASK_EXT

	mov		r0, #0
	mov		pc, lr