tuareg.h

Centrality Atlas II development software

#define TUAREG_EIC_SIR25	0xc4	/* Source Interrupt 9 register          */
#define TUAREG_EIC_SIR26	0xc8	/* Source Interrupt 10 register         */
#define TUAREG_EIC_SIR27	0xcc	/* Source Interrupt 11 register         */
#define TUAREG_EIC_SIR28	0xd0	/* Source Interrupt 12 register         */
#define TUAREG_EIC_SIR29	0xd4	/* Source Interrupt 13 register         */
#define TUAREG_EIC_SIR30	0xd8	/* Source Interrupt 14 register         */
#define TUAREG_EIC_SIR31	0xdc	/* Source Interrupt 15 register         */


/*
 * TUAREG_EIC_ICR bits
 */

#define TUAREG_ICR_IRQEN	(1<<0)
 

/*
 * Interrupt definitions
 */


#define TUAREG_INTR_CLASS_EXTERNAL				0x0
#define TUAREG_INTR_CLASS_EXTERNAL_4			0x1 	 	      
#define	TUAREG_INTR_CLASS_WAKE					0x2
#define TUAREG_INTR_CLASS_EFT1					0x3
#define TUAREG_INTR_CLASS_EFT2					0x4
#define TUAREG_INTR_CLASS_UART1					0x5
#define TUAREG_INTR_CLASS_UART2					0x6
#define TUAREG_INTR_CLASS_DMA					0x7            
#define TUAREG_INTR_CLASS_DMA0					0x8
#define TUAREG_INTR_CLASS_DMA1					0x9
#define TUAREG_INTR_CLASS_USB_H					0xa
#define TUAREG_INTR_CLASS_USB_L					0xb 
#define TUAREG_INTR_CLASS_CAN					0xc 
#define TUAREG_INTR_CLASS_SPI1					0xd
#define TUAREG_INTR_CLASS_SPI2					0xe
#define TUAREG_INTR_CLASS_IDE1					0xf 
#define TUAREG_INTR_CLASS_RTC					0x10
#define	TUAREG_INTR_CLASS_GPS_SYNC				0x11
#define TUAREG_INTR_CLASS_GPS_SLEEP				0x12
#define TUAREG_INTR_CLASS_GPS_100TICK			0x13
#define TUAREG_INTR_CLASS_GPS_20TICK			0x14
#define TUAREG_INTR_CLASS_GPS_1TICK				0x15  
#define TUAREG_INTR_CLASS_GPS_DATA				0x16
#define TUAREG_INTR_CLASS_AD					0x17 
#define TUAREG_INTR_CLASS_AUDIO_DA				0x18
#define TUAREG_INTR_CLASS_SERIALAUDIO_FRAME		0x19  
#define TUAREG_INTR_CLASS_SERIALAUDIO_OU		0x1a
#define TUAREG_INTR_CLASS_SERIALAUDIO_RDATA		0x1b 
#define TUAREG_INTR_CLASS_SERIALAUDIO_TDATA		0x1c
#define TUAREG_INTR_CLASS_EFT2_COMPAREA			0x1d  
#define TUAREG_INTR_CLASS_EFT2_COMPAREB			0x1e  
#define TUAREG_INTR_CLASS_WATCHDOG				0x1f

/*
 * -------------------------------------------------------------------------
 * Wakeup / Interrupt Unit (WIU)
 * -------------------------------------------------------------------------
 */

#define TUAREG_PCG1_PUR1_WAKEWIU	0x400
#define TUAREG_WIU_BASE				0xf0002400
#define TUAREG_WIU_SIZE				0x10

/* WIU Registers offset from Base address */
#define TUAREG_WIU_WUCTRL			0x00
#define TUAREG_WIU_WUMR				0x04
#define TUAREG_WIU_WUTR				0x08
#define TUAREG_WIU_WUPR				0x0c

/* Register Bit Definitions */
#define TUAREG_WIU_WUCTRL_WKUPINT	(1<<0)
#define TUAREG_WIU_WUCTRL_INTEN		(1<<1)

#define TUAREG_ETH_TRIG				(1<<2)


/*
 * -------------------------------------------------------------------------
 * General Purpose IO
 * -------------------------------------------------------------------------
 */


/* GPIO base address */
#define	TUAREG_GPIO_BASE	0xe0002000		


#define	TUAREG_GPIO_SIZE		0x10


#define TUAREG_GPIO3_BASE	0xf0001400
#define TUAREG_GPIO4_BASE	0xf0001800

/* GPIO registers, offset from base address */

#define	TUAREG_GPIO_PC0		0x00
#define	TUAREG_GPIO_PC1		0x04
#define	TUAREG_GPIO_PC2		0x08
#define	TUAREG_GPIO_PD		0x0c


/*
 *  PC0 bits
 */

#define TUAREG_PC0_C00		1
#define TUAREG_PC0_C01		(1<<1)
#define TUAREG_PC0_C02		(1<<2)
#define TUAREG_PC0_C03		(1<<3)


/*
 *  PC1 bits
 */

#define TUAREG_PC1_C00		1
#define TUAREG_PC1_C01		(1<<1)
#define TUAREG_PC1_C02		(1<<2)
#define TUAREG_PC1_C03		(1<<3)

/*
 *  PC2 bits
 */

#define TUAREG_PC2_C00		1
#define TUAREG_PC2_C01		(1<<1)
#define TUAREG_PC2_C02		(1<<2)
#define TUAREG_PC2_C03		(1<<3)


/*
 * -------------------------------------------------------------------------
 * Miscellanea Registers
 * -------------------------------------------------------------------------
 */



/* CGC base address */
#define	TUAREG_CGC_BASE		0xf0002c00


#define	TUAREG_CGC_SIZE		0x8

/* CGC registers, offset from base address */

#define TUAREG_CGC_PCG1		0x00
#define TUAREG_CGC_PUR1		0x04
#define TUAREG_CGC_PCG2		0x0c
#define TUAREG_CGC_PUR2		0x10



/*
 *  wakeup bits
 */


#define	TUAREG_PCG1_PUR1_WAKEUART0	0x21
#define	TUAREG_PCG1_PUR1_WAKEUART1	0x41
#define TUAREG_PCG1_PUR1_WAKEATA	0x08
#define TUAREG_PCG2_PUR2_WAKEATA	0x02



/*
 *  RTC wakeup bits
 */

#define TUAREG_PCG1_PUR1_WAKERTC	0x800
#define TUAREG_PCG1_PUR1_WAKERTC	0x800


/*
 * -------------------------------------------------------------------------
 * RCCU Registers
 * -------------------------------------------------------------------------
 */

/* RCCU base address */
#define	TUAREG_RCCU_BASE		0xf0001000


#define	TUAREG_RCCU_SIZE		0x18

/* RCCU registers, offset from base address */

#define TUAREG_RCCU_PLLCONF			0x0
#define TUAREG_RCCU_DIVCONF			0x4
#define TUAREG_RCCU_CLKFLAG 		0x8
#define TUAREG_RCCU_CLKCTL			0xC
#define TUAREG_RCCU_MSKCTL			0x10
#define TUAREG_RCCU_SYSPROT			0x14


/*
 * PLLCONF bits
 */


#define TUAREG_PLLCONF_PLLOFF		(1<<9)

#define TUAREG_PLLCONF_DIVMASK		0xc0
#define TUAREG_PLLCONF_DIV1			0x0
#define TUAREG_PLLCONF_DIV2			0x40
#define TUAREG_PLLCONF_DIV4			0x80
#define TUAREG_PLLCONF_DIV8			0xc0

#define TUAREG_PLLCONF_MULTMASK		0x3f

/*
 * DIVCONF bits
 */

#define TUAREG_DIVCONF_APBMASK		0x3
#define TUAREG_DIVCONF_APBDIV2		0x0
#define TUAREG_DIVCONF_APBDIV4		0x1
#define TUAREG_DIVCONF_APBDIV8		0x2
#define TUAREG_DIVCONF_APBDIV16		0x3


/*
 * SYSPROT bits
 */

#define TUAREG_SYSPROT_UNLOCK		(1<<0)


/*
 * CLKCTL
 */

#define TUAREG_CLKCTL_SWRST			(1<<3)



/*
 * Input clock
 */

#define TUAREG_INPUT_CLOCK			49107000  /* HZ	*/


/*
 * -------------------------------------------------------------------------
 * ATAPI configuration space registers
 * -------------------------------------------------------------------------
 */

#define TUAREG_CONFIG_ATA_BASE		0xc0000100

#define TUAREG_CONFIG_ATA_SIZE		0x100

/* configuration register offsets	*/


#define	TUAREG_CONFIG_ATA_XCMD		0x4
#define	TUAREG_CONFIG_ATA_PIDETIM	0x40
#define	TUAREG_CONFIG_ATA_SLIDETIM	0x44

/*
 *	 XCMD bits
 */

#define TUAREG_XCMD_IO						0x1


/*
 *  PIEDTIM bits
 */

#define	TUAREG_PIDETIM_IDEDECODE	1<<15
#define	TUAREG_PIDETIM_SLAVETIMING	1<<14



#endif	/* __ARM_TUAREG_H_INCLUDED */

/* __SRCVERSION("tuareg.h $Rev: 169789 $"); */