bfstartup.asm

ADI公司SHARC与BlackFin通过SPI协议相互通信的源代码

* RDIV has always to be re-calculated according to the actual system clock *
* You can either use the defined value that fits to the PCC settings or    *
* call __get_rdiv to calculate RDIV 'on the fly'                            *
***************************************************************************/

#if defined __PASEBF532__
    IMM32(R0,EBIU_SDRRC_VAL);
#else
    call __get_rdiv;
#endif
w[P5 + lo(EBIU_SDRRC)] = R0;

#endif /* EN_SDRSDRAM */


/*****************************************************************************
 Description:   Configure and enable DDR SDRAM
******************************************************************************/
#if defined EN_DDRSDRAM


/*************************
* Reset Control Register *
**************************/

R7 = w[P5 + lo(EBIU_RSTCTL)];
bitset(R7,bitpos(DDRSRESET));
w[P5 + lo(EBIU_RSTCTL)] = R7;


/****************************
* Memory Control 0 Register *
****************************/

IMM32(R7,EBIU_DDRCTL0_VAL);
[P5 + lo(EBIU_DDRCTL0)] = R7;


/****************************
* Memory Control 1 Register *
****************************/

IMM32(R7,EBIU_DDRCTL1_VAL);
[P5 + lo(EBIU_DDRCTL1)] = R7;


/****************************
* Memory Control 2 Register *
****************************/

IMM32(R7,EBIU_DDRCTL2_VAL);
[P5 + lo(EBIU_DDRCTL2)] = R7;


#endif /* EN_DDRSDRAM */


/*****************************************************************************
 End of Configure EBIU
******************************************************************************/


#if defined (SET_PLL) || defined (EN_SDRAM)

/*********************************************
* Restore System Interrupt Wakeup Registers  *
*********************************************/

R7 = IWR_ENABLE_ALL;

[P5 + lo(SIC_IWR0)] = R7;
#if defined (__ADSPBF52x__) || defined (__ADSPBF538__) || defined (__ADSPBF54x__) || defined (__ADSPBF561__)
[P5 + lo(SIC_IWR1)] = R7;
#endif
#if defined __ADSPBF54x__
[P5 + lo(SIC_IWR2)] = R7;
#endif

#endif /* defined (SET_PLL) || defined (EN_SDRAM) */


/****************************************************************************
 Description:   Configure Default Service Handlers
*****************************************************************************/

IMM32(P5,EVT2);
IMM32(R7,nmi_handler);
[P5++] = R7;
IMM32(R7,evx_handler);
[P5++] = R7;
/* IVT4 isn't used */
[P5++] = R7;
IMM32(R7,ivhw_handler);
[P5++] = R7;
IMM32(R7,ivtmr_handler);
[P5++] = R7;
IMM32(R7,ivg7_handler);
[P5++] = R7;
IMM32(R7,ivg8_handler);
[P5++] = R7;
IMM32(R7,ivg9_handler);
[P5++] = R7;
IMM32(R7,ivg10_handler);
[P5++] = R7;
IMM32(R7,ivg11_handler);
[P5++] = R7;
IMM32(R7,ivg12_handler);
[P5++] = R7;
IMM32(R7,ivg13_handler);
[P5++] = R7;
IMM32(R7,ivg14_handler);
[P5++] = R7;
IMM32(R7,ivg15_handler);
[P5++] = R7;

/****************************************************************************
 Description:   Configure and Enable CPLB / Cache
*****************************************************************************/

#if defined INSTR_CACHE_EN
    call __icplb_init;
#endif
#if defined DATA_CACHE_EN
    call __dcplb_init;
#endif


/****************************************************************************
 Description:   Leave startup code either to User or Supervisor Mode
                jump to main routine
*****************************************************************************/

IMM32(P5,_main);
RETI = P5;

#ifndef RUN_USER
    /* Enable Interrupt 15 and go to SUPERVISOR mode */
    IMM32(P5,EVT15);
    IMM32(R7,ivg15_handler.supervisor);
    [P5] = R7;
    R7 = 0x8000(z);
    sti R7;
    raise 15;
#endif

/* Return from RESET (IVG2) to either USER (no IVG) or SUPERVISOR (IVG15) */
rti;

#ifndef RUN_USER
    ivg15_handler.supervisor:
    [--SP] = RETI;
    IMM32(P5,_main);
    jump (P5);
#endif /* not RUN_USER */


/****************************************************************************
 Description:  Configure default Interrupt / Exception Handler
*****************************************************************************/

nmi_handler: EMUEXCPT;
nmi_handler.fail: jump nmi_handler.fail;


evx_handler:            /* Exception Handler 3 */
#if defined DATA_CACHE_EN

    /**********************
    * Verify a DCPLB miss *
    **********************/

    [--SP] = (R7:6);

    R7 = SEQSTAT;
    R6 = 0x3F;
    R7 = R7 & R6;
    R6 = 0x26; /* Data access CPLB miss */
    CC = R7 == R6;

    (R7:6) = [SP++];
    if !CC jump skip_DCPLB_MISS;


    [--SP] = (R7:7,P5:5);

    IMM32(P5,EVT14);
    IMM32(R7,__dcplb_handler);
    [P5] = R7;
    IMM32(P5,IMASK);
    R7 = [P5];
    bitset (R7,bitpos(EVT_IVG14));
    [P5] = R7;
    raise (bitpos(EVT_IVG14));

    (R7:7,P5:5) = [SP++];
    rtx;

    skip_DCPLB_MISS:

#endif

#if defined INSTR_CACHE_EN

    /**********************
    * Verify a ICPLB miss *
    **********************/

    [--SP] = (R7:6);

    R7 = SEQSTAT;
    R6 = 0x3F;
    R7 = R7 & R6;
    R6 = 0x2C; /* Instruction access CPLB miss */
    CC = R7 == R6;

    (R7:6) = [SP++];
    if !CC jump skip_ICPLB_MISS;


    [--SP] = (R7:7,P5:5);

    IMM32(P5,EVT14);
    IMM32(R7,__icplb_handler);
    [P5] = R7;
    IMM32(P5,IMASK);
    R7 = [P5];
    bitset (R7,bitpos(EVT_IVG14));
    [P5] = R7;
    raise (bitpos(EVT_IVG14));

    (R7:7,P5:5) = [SP++];
    rtx;

    skip_ICPLB_MISS:

#endif
    
/********************************************
* I don't know how to handle this exception *
********************************************/

EMUEXCPT;
evx_handler.fail: jump evx_handler.fail;

evx_handler.END:


ivhw_handler: rti;
EMUEXCPT;
ivhw_handler.fail: jump ivhw_handler.fail;

ivtmr_handler:
EMUEXCPT;
ivtmr_handler.fail: jump ivtmr_handler.fail;

ivg7_handler:
EMUEXCPT;
ivg7_handler.fail: jump ivg7_handler.fail;

ivg8_handler:
EMUEXCPT;
ivg8_handler.fail: jump ivg8_handler.fail;

ivg9_handler:
EMUEXCPT;
ivg9_handler.fail: jump ivg9_handler.fail;

ivg10_handler:
EMUEXCPT;
ivg10_handler.fail: jump ivg10_handler.fail;

ivg11_handler:
EMUEXCPT;
ivg11_handler.fail: jump ivg11_handler.fail;

ivg12_handler:
EMUEXCPT;
ivg12_handler.fail: jump ivg12_handler.fail;

ivg13_handler:
EMUEXCPT;
ivg13_handler.fail: jump ivg13_handler.fail;

ivg14_handler:
EMUEXCPT;
ivg14_handler.fail: jump ivg14_handler.fail;

ivg15_handler:
EMUEXCPT;
ivg15_handler.fail: jump ivg15_handler.fail;


__reset.end:


/*****************************************************************************
 EOF
******************************************************************************/